Dielectric-Insulated LED Structure for Lattice Dislocation Bypass

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Solution Overview

Problem

Conventional solid-state lighting (SSL) devices, such as LEDs, suffer from high lattice dislocation densities that lead to reduced optical and electrical performance due to unintended carrier passages, which existing methods like incorporating interlayers cannot fully eliminate, adding cost and time to the manufacturing process.

Innovation Solution

The introduction of dielectric insulation materials, such as silicon dioxide or hafnium silicate, is applied to the SSL structure to prevent carrier passages by conforming to or filling indentations within the semiconductor materials, thereby reducing non-radiative recombination and enhancing optical efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If conventional epitaxial growth is used to form GaN/InGaN materials, then the manufacturing process is simple and cost-effective, but high lattice dislocation density forms which negatively impacts optical and electrical performance

Engineering Contradiction:
Improvemanufacturing process simplicityVSAvoidoptical and electrical performance
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

A dielectric material layer is introduced as an intermediary substance between the n-type GaN layer and the p-type GaN layer. This dielectric layer fills the indentations created by lattice dislocations and prevents carrier passages from forming, thereby eliminating the harmful effect of dislocations without changing the epitaxial growth process itself. The dielectric material acts as a mediator that blocks the formation of unintended carrier pathways while maintaining the simplicity of the manufacturing process.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If aluminum nitride or silicon nitride interlayers are incorporated to address lattice dislocations, then the optical and electrical performance improves, but manufacturing cost and process time increase

Engineering Contradiction:
Improveoptical and electrical performanceVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent changes the material parameter from conductive/semiconductive interlayers (AlN, SiN) to a dielectric material. This parameter change fundamentally alters how the interlayer functions: instead of relying on the specific crystal structure and piezoelectric properties of AlN or SiN, the dielectric material relies on its insulating properties to block carrier passages. This simplifies the manufacturing process because the dielectric material can be deposited using standard techniques and does not require the same level of lattice matching control as AlN or SiN interlayers.

Inventive Principle:
Principle #35Parameter changes

3Ease of manufacture

If no interlayers are used, then manufacturing costs are low, but lattice dislocations create unintended carrier passages that bypass the active region and reduce efficiency

Engineering Contradiction:
Improvemanufacturing costVSAvoidnon-radiative recombination
Core Design Contradiction:
Ease of manufactureVSLoss of energy

Solution Approach 1:

The patent extracts or removes the harmful carrier passages from the device structure by filling the indentations with dielectric material. The dielectric material is deposited conformally and then planarized, effectively extracting the unwanted carrier pathways that would otherwise allow non-radiative recombination. This approach maintains low manufacturing costs by using a straightforward deposition and planarization process rather than incorporating complex interlayer structures.

Inventive Principle:
Principle #2Taking out (Extraction)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach significantly improves optical efficiencies by eliminating bypassing carrier passages, leading to enhanced performance and reduced manufacturing costs by minimizing lattice dislocation impacts.

Implementation Method 1

The formed SSL structure 101 can include a dielectric material 118 deposited into the indentations 110

Methodology Applied
Scientific EffectDeposition: Deposition (physical)

Data Source

PatentUS20240030374A1Solid state lighting devices with dielectric insulation and methods of manufacturing
Publication Date: 2024.01.25 MICRON TECHNOLOGY INC
  • US20240030374A1 patent drawing
  • US20240030374A1 patent drawing
  • US20240030374A1 patent drawing

AI summary

Semiconductor lighting devices and associated methods of manufacturing are disclosed herein. In one embodiment, a semiconductor lighting device includes a first semiconductor material, a second semiconductor material spaced apart from the first semiconductor material, and an active region between the first and second semiconductor materials. The semiconductor lighting device also includes an indentation extending from the second semiconductor material toward the active region and the first semiconductor material and an insulating material in the indentation of the solid state lighting structure.