Dielectric-Immersed PCB Chip Layout for Higher Packing Density
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Solution Overview
Problem
Existing circuit board assemblies for large-scale computing face challenges in increasing chip density due to the use of metallic spacers for heat dissipation and voltage drop, which occupy valuable space and reduce the number of chips that can be packed on a PCB, leading to decreased computing performance and energy efficiency.
Innovation Solution
The assembly eliminates or reduces the use of metallic spacers between adjacent chips, allowing for closer chip placement and immersion in dielectric liquid for cooling, thereby increasing chip density and reducing voltage drop.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If metallic spacers are used between adjacent chips for heat dissipation and voltage drop management, then heat dissipation and voltage stability are improved, but chip density decreases due to occupied space
Solution Approach 1:
The patent removes metallic spacers from between adjacent chips, extracting the heat dissipation and voltage management function to an alternative solution (dielectric liquid immersion). This eliminates the space occupation by spacers, allowing chips to be placed closer together and increasing chip density on the circuit board.
Solution Approach 2:
The patent introduces dielectric liquid immersion as the cooling and electrical isolation medium, replacing solid metallic spacers. The liquid fills the gaps between chips, providing both thermal management through convection and electrical isolation through its dielectric properties, enabling closer chip placement without compromising voltage stability.
2Temperature
If metallic spacers are used between adjacent chips, then heat dissipation is improved, but chip density decreases due to occupied space
Solution Approach 1:
The patent removes metallic spacers from between adjacent chips, extracting the heat dissipation function to an alternative solution (dielectric liquid immersion). This eliminates the space occupation by spacers, allowing chips to be placed closer together and increasing chip density on the circuit board.
Solution Approach 2:
The patent introduces dielectric liquid immersion as the cooling medium, replacing solid metallic spacers. The liquid fills the gaps between chips, providing thermal management through convection and conduction, enabling closer chip placement while maintaining effective heat dissipation.
3Productivity
If chip spacing is reduced to increase chip density, then computing performance increases, but voltage drop between chips increases
Solution Approach 1:
The patent introduces dielectric liquid as an intermediary medium between closely spaced chips. This liquid provides electrical isolation and maintains stable voltage levels between adjacent chips, allowing them to be placed closer together for increased computing performance without suffering from excessive voltage drop.
4Productivity
If more chips are packed on a PCB, then computing performance increases, but heat generation increases
Solution Approach 1:
The patent uses dielectric liquid immersion to provide efficient thermal management for high-density chip arrangements. The liquid circulates around the chips, absorbing and removing heat through convection, enabling higher chip density and computing performance without excessive heat accumulation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables more chips to be packed on a PCB, enhancing computing performance and energy efficiency by increasing the hash rate and reducing power consumption.
Implementation Method 1
the dielectric liquid is thermo-conductive
Implementation Method 2
a boilerplate that is coupled to the plurality of chips. The boilerplate is configured to dissipate heat generated by the plurality of chips
Implementation Method 3
a dielectric liquid in which the circuit board is immersed
Data Source
AI summary
A circuit board assembly is provided. The circuit board assembly includes a circuit board and a plurality of chips assembled on a surface of the circuit board. The plurality of chips include integrated circuit (IC) chips. At least two chips are positioned on the surface of the circuit board adjacent to one another with a spacing separating the two chips that is less than a minimum dimension of each of the two chips. A circuit board and a method for circuit board assembly are also provided.


