Dielectric Pillars in 3D NAND for Stack Stability
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Solution Overview
Problem
Current methods for manufacturing three-dimensional memory devices, such as vertical NAND strings, face challenges in achieving stable and efficient structure formation due to mechanical stress and potential stack collapse during the manufacturing process.
Innovation Solution
The approach involves forming an alternating stack of electrically conductive and insulating layers over a substrate, with an array of dielectric pillars between the stack and the substrate, and replacing a sacrificial matrix layer with a source conductive layer to create memory stack structures, thereby reducing mechanical stress and preventing collapse.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If conventional manufacturing methods are used to form three-dimensional memory devices, then manufacturing process simplicity is maintained, but mechanical stress causes stack collapse and structural instability
Solution Approach 1:
The patent introduces dielectric pillars that segment the continuous sacrificial matrix layer into discrete regions. These pillars divide the structure into manageable units, providing mechanical support to prevent stack collapse while maintaining the overall manufacturing process simplicity. The segmentation allows stress distribution throughout the structure.
Solution Approach 2:
The dielectric pillars act as intermediary support structures between the alternating stack and the substrate. These pillars provide mechanical support during manufacturing without interfering with the final device functionality. The sacrificial matrix layer serves as another intermediary that is later replaced with conductive material, enabling sequential processing steps.
2Strength
If dielectric pillars are introduced to reduce mechanical stress, then stack stability is improved, but manufacturing process complexity increases
Solution Approach 1:
The dielectric pillars are formed preliminarily before the alternating stack is fully assembled and before the sacrificial matrix layer is replaced. This preliminary formation of support structures ensures mechanical strength is established early in the process, preventing collapse during subsequent manufacturing steps without requiring complex retroactive modifications.
Solution Approach 2:
The patent utilizes parameter changes in material properties - the dielectric pillars have different electrical and mechanical properties compared to the surrounding materials. By selecting dielectric materials with appropriate mechanical strength and electrical insulation properties, the structure gains structural support while maintaining electrical functionality. The sacrificial matrix material is selected to be removable after serving its support function.
3Reliability
If sacrificial matrix layer is replaced with source conductive layer, then electrical functionality is improved, but process steps increase
Solution Approach 1:
The sacrificial matrix layer is extracted and removed after it has served its purpose of providing mechanical support during manufacturing. This extraction allows replacement with the source conductive layer, which provides the necessary electrical functionality. The temporary removal of the sacrificial material enables the final device structure without permanently adding complexity.
Solution Approach 2:
The sacrificial matrix layer is discarded after fulfilling its temporary support function, and the space it occupied is recovered for the source conductive layer. This approach allows the manufacturing process to temporarily use materials that facilitate structure formation, then replace them with functional materials in a controlled manner.
Data Source
AI summary
A three-dimensional memory device includes an alternating stack of electrically conductive layers and insulating layers located over a substrate, an array of memory stack structures, each memory stack structure extending through the alternating stack and including a memory film and a semiconductor channel laterally surrounded by the memory film, and an array of dielectric pillars located between the alternating stack and the substrate.