Dielectric-Filled Substrate Trench for Low-Capacitance Galvanic Isolation
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Solution Overview
Problem
As devices scale, the distance between electrodes and the substrate decreases, increasing parasitic capacitance into the substrate, limiting the ability to add dielectric thickness or increase the number of dielectric layers for reliable galvanic isolation in integrated circuits.
Innovation Solution
A dielectric-filled trench is introduced in the substrate under the electrodes, extending fully to the backside, reducing parasitic capacitance and enhancing capacitive coupling, while a deep trench isolation can be used as an alternative, both providing stronger galvanic isolation without requiring thicker BEOL interconnect layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If the distance between electrodes and substrate is decreased due to device scaling, then device integration density is improved, but parasitic capacitance into the substrate increases
Solution Approach 1:
A dielectric material is introduced as an intermediary substance between the electrode and the substrate. This dielectric layer acts as a mediator that reduces the direct capacitive coupling between the electrode and substrate, thereby lowering parasitic capacitance while allowing the electrode to remain close to the substrate for high integration density.
Solution Approach 2:
The dielectric constant (permittivity) of the material between the electrode and substrate is changed by introducing a low-k dielectric material. By changing this physical parameter, the parasitic capacitance is reduced without increasing the physical distance between the electrode and substrate, thus maintaining high integration density.
2Reliability
If dielectric thickness or number of dielectric layers is increased to reduce parasitic capacitance, then galvanic isolation is improved, but available space is consumed
Solution Approach 1:
Instead of increasing the physical thickness of dielectric layers, the invention changes the dielectric constant parameter by using a low-k dielectric material. This allows achieving the same reduction in parasitic capacitance with much thinner layers, preserving vertical space in the device structure.
Solution Approach 2:
The invention extracts the function of parasitic capacitance reduction from the BEOL dielectric layers and relocates it to a dedicated dielectric layer formed specifically in the trench structure. This separation allows the BEOL layers to maintain their original thickness while the trench dielectric provides the capacitance reduction function.
3Reliability
If BEOL dielectric layer thickness is increased to provide higher breakdown voltage, then galvanic isolation strength is improved, but device area and complexity increase
Solution Approach 1:
The galvanic isolation function is segmented into two parts: the BEOL dielectric layers maintain their original design for signal routing, while a separate dedicated dielectric layer is formed in a trench structure specifically for providing breakdown voltage and isolation strength. This segmentation allows each layer to be optimized for its specific function without increasing overall complexity.
Solution Approach 2:
A dedicated dielectric layer acts as an intermediary between the BEOL interconnect layers and the substrate, specifically tasked with providing high breakdown voltage. This mediator allows the BEOL layers to remain thin and simple while still achieving the required isolation strength through the intermediate dielectric layer.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution achieves kilo-Volt level galvanic isolation with reduced parasitic capacitance, improving electrical isolation between voltage domains and preventing lateral spiking, at a lower cost than increasing BEOL interconnect layer thickness or number.
Implementation Method 1
the distance between some electrodes and the substrate have decreased, which increases parasitic capacitance into the substrate
Implementation Method 2
a dielectric-filled trench in the substrate under the first electrode and the second electrode
Implementation Method 3
The two circuits are typically at different electrical voltages, e.g., a high-voltage and a low-voltage. Galvanic isolations are typically created by forming a parallel-plate capacitor using electrodes in different metallization layers
Data Source
AI summary
A structure includes a substrate having a frontside and a backside. A first electrode is in a first insulator layer and is adjacent to the frontside of the substrate. The first electrode is part of a redistribution layer (RDL). A second electrode is between the substrate and the first electrode. A dielectric-filled trench in the substrate is under the first electrode and the second electrode, the dielectric-filled trench may extend fully to the backside of the substrate. The structure provides a galvanic isolation that exhibits less parasitic capacitance to the substrate from the lower electrode.