Differential Amplifier Circuit for Low-Supply Delay Reduction
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Solution Overview
Problem
Conventional differential amplifiers experience undue delay in output signals due to fluctuations in internal reference voltage levels, particularly when the power supply voltage drops, affecting the response speed of NMOS transistors and resulting in increased output delay.
Innovation Solution
The differential amplifier design includes a third NMOS transistor that adjusts the voltage level of the second node in response to the inverted input signal, allowing additional current to flow and improving delay when a low-level input signal is present, thereby maintaining output signal duty and reducing skew, even when the reference voltage signal drops.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If the power supply voltage drops, then the power consumption decreases, but the response speed of NMOS transistors slows and output signal delay increases
Solution Approach 1:
The patent applies preliminary action by proactively adjusting the reference voltage level based on the input signal level before the delay problem occurs. When a low-level input signal is detected, the reference voltage is raised in advance to ensure sufficient voltage difference, which maintains fast response speed of NMOS transistors and prevents output signal delay even under dropped power supply conditions
Solution Approach 2:
The patent dynamically changes the reference voltage parameter based on operating conditions. The reference voltage is adjusted according to the input signal level: raised when low-level input signals are present to maintain response speed, and kept at normal levels otherwise. This parameter adaptation resolves the contradiction between low power consumption and fast response
2Loss of energy
If the reference voltage level is lowered to reduce power consumption, then the power efficiency improves, but the response speed of NMOS transistors decreases and delay increases
Solution Approach 1:
The patent introduces dynamics by making the reference voltage adjustable rather than fixed. The reference voltage dynamically adapts to different operating conditions: it is raised when low-level input signals are detected to maintain fast response speed, and can be lowered during normal operation to improve power efficiency. This dynamic adjustment resolves the contradiction between power efficiency and response speed
3Loss of time
If a third NMOS transistor is added to adjust voltage levels, then the output delay is reduced and operating characteristics improve, but the device complexity increases
Solution Approach 1:
The third NMOS transistor serves multiple functions: it acts as a switch controlled by the inverted input signal, functions as a voltage adjustment element to raise the reference voltage level, and operates as a current path controller. This multi-functionality justifies the added device complexity by delivering significant performance benefits in reducing output delay and improving response speed under low power supply conditions
Data Source
AI summary
A differential amplifier is disclosed. The differential amplifier includes a first load element coupled between a first voltage and a first node. A second load element is coupled between the first voltage and a second node. A current source is coupled between a second voltage and a third node. A first input element is coupled between the first node and the third node and receives an input signal so as to adjust a voltage level of the first node. A second input element is coupled between the second node and the third node and receives a reference voltage signal so as to adjust a voltage level of the second node. A third input element is coupled between the second node and the third node and receives the input signal so as to adjust the voltage level of the second node.