Differential Amplifier Discharge Path for Low-Voltage Duty Balance
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Solution Overview
Problem
Differential amplifier circuits in semiconductor devices face challenges in maintaining operational balance and duty ratio at low power supply voltages, leading to potential signal distortion and failure to meet specifications due to charge retention at intermediate nodes.
Innovation Solution
Incorporating discharge circuits in the assist circuits on the reference signal side to form discharge paths from intermediate nodes, allowing the differential amplifier circuits to operate effectively across a broader range of power supply voltages by managing charge at these nodes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the power supply voltage is reduced to extend the operating voltage range, then the adaptability of the differential amplifier circuit is improved, but the charge retention at intermediate nodes causes duty ratio deterioration and operational imbalance
Solution Approach 1:
The patent extracts the charge accumulation problem from the intermediate node by introducing a dedicated discharge circuit. The discharge circuit selectively removes accumulated charge from the intermediate node during specific operational phases, preventing duty ratio deterioration while enabling broader voltage operation. This separation of charge management function resolves the contradiction between extended voltage range and maintained duty ratio reliability.
Solution Approach 2:
The discharge circuit acts as an intermediary element between the intermediate node and ground, mediating the charge accumulation issue. By introducing this intermediate charge discharge path, the circuit maintains proper duty ratio even when operating at reduced supply voltages that would otherwise cause charge retention problems. This intermediary mechanism enables the system to achieve both extended voltage adaptability and reliable duty ratio performance.
2Adaptability or versatility
If assist circuits are added to improve operation at low voltages, then the operating voltage range is extended, but the device complexity increases
Solution Approach 1:
The patent merges the discharge function with the existing assist circuit structure by sharing transistors and nodes. The discharge circuit utilizes existing circuit elements strategically positioned to provide charge discharge capability without adding completely separate circuit blocks. This merging approach extends the operating voltage range while minimizing the increase in device complexity through resource sharing.
Solution Approach 2:
The assist circuit transistors are designed to serve multiple functions: they provide both the assist function for low-voltage operation and the discharge function for charge management. By making these components multi-functional, the patent extends the operating voltage range without proportionally increasing device complexity, as the same hardware elements perform multiple critical roles in the circuit operation.
3Reliability
If discharge circuits are added to manage charge at intermediate nodes, then the signal integrity is improved, but the device complexity increases
Solution Approach 1:
The discharge circuit is designed to proactively discharge accumulated charge before it can cause duty ratio deterioration or signal distortion. By performing preliminary charge removal at strategically determined moments in the operational cycle, the circuit maintains signal integrity without requiring complex continuous monitoring or correction mechanisms. This preliminary action approach improves reliability while keeping the discharge circuit structure relatively simple.
Data Source
AI summary
According to one embodiment, in a first differential amplifier circuit of a semiconductor device, a first transistor receives an input signal at the gate. A second transistor forms a differential pair with the first transistor. The second transistor receives a reference signal at the gate. A third transistor is connected in series with the first transistor. A fourth transistor is connected in series with the second transistor. A fifth transistor is disposed on the output side. The fifth transistor forms a first current mirror circuit with the fourth transistor. A sixth transistor is connected to the drain of the second transistor in parallel with the fourth transistor. The sixth transistor forms a second current mirror circuit with the fifth transistor. A first discharge circuit is connected to the source of the sixth transistor.