Differential Computation Circuit for In-Memory AI Operations
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Solution Overview
Problem
The communication bottleneck between processors and memory devices, particularly in artificial intelligence models, leads to operation speed deterioration due to insufficient computation capacity in devices like smartphones and personal computers.
Innovation Solution
A differential computation circuit and memory device that converts weights into a differential format, performs computations within the memory device, and outputs results directly to the processor, reducing the computational load on the processor and minimizing data exchange.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If computation operations are performed by the processor using weights from memory device, then computation accuracy is maintained, but communication bottleneck occurs and operation speed deteriorates
Solution Approach 1:
The patent merges the memory device and computation function by implementing a differential computation circuit directly within the memory device. This allows the memory device to perform multiplication operations on input elements using stored weights, combining storage and computation functions into a single integrated system, thereby eliminating the need for separate data transfer between memory and processor.
Solution Approach 2:
The patent introduces differential weights as an intermediary representation that enables computation within the memory device. By converting standard weights into differential format (where each weight is represented as a difference from a reference value), the system can perform multiplication operations using simpler circuitry within the memory device, acting as an intermediary mechanism to bridge storage and computation functions.
2Productivity
If more computation operations are performed within the memory device, then communication bottleneck is reduced, but device complexity increases
Solution Approach 1:
The patent changes the parameter representation of weights from standard format to differential format. By storing weights as differential values (difference from a reference weight) rather than absolute values, the computation circuit can perform multiplication operations using simpler logic, reducing the complexity of the differential computation circuit while maintaining computation capability.
Solution Approach 2:
The patent segments the weight data into differential components (reference weight and differential values) and processes them separately through dedicated circuitry. The differential computation circuit is divided into specific functional blocks that handle differential weight storage, input element multiplication, and output generation, making the overall complex computation task manageable through modular segmentation.
Data Source
AI summary
A memory device according various example embodiments may comprise a format conversion circuit configured to generate a plurality of differential weights based on a plurality of weights provided from an external device, a memory cell array configured to store a first input element provided from the external device and the plurality of differential weights, a quantization circuit configured to generate a plurality of scale coefficients based on the plurality of differential weights, and an input element scaling circuit configured to provide a plurality of output elements corresponding to products of the first input element and each of the plurality of weights to the external device based on the plurality of scale coefficients.