Differential Fuse-Readout Circuit for Semiconductor Reliability
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Solution Overview
Problem
Existing semiconductor devices face challenges in accurately and efficiently reading fuse data due to conditions such as poorly blown or nicked fuses, leading to persistent read errors that affect device reliability.
Innovation Solution
A differential fuse-readout circuit that uses differential signals from redundant fuses to verify data accuracy, allowing for improved reliability and speed in reading high resistance fuses, while reducing the soak current required to blow fuses, thereby scaling down fuse and support circuitry.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional fuse reading circuits are used, then the device can read fuse data, but read errors occur due to poorly blown or nicked fuses, reducing reliability
Solution Approach 1:
The patent creates a complementary copy of the fuse array with inverted logic (BLN vs BL0). By reading both the original and complementary fuse arrays simultaneously using differential signaling, the system can verify results and detect reading errors. If one fuse reads incorrectly due to poor blowing or nicking, the complementary fuse should read the opposite state, allowing error detection and correction.
Solution Approach 2:
The differential fuse reading circuit uses feedback mechanisms where the reading circuit compares signals from both fuse arrays and adjusts its interpretation based on expected complementary relationships. The circuit monitors the differential signal and can detect when readings deviate from expected patterns, providing feedback about reading quality and enabling error handling.
2Reliability
If high current is used to blow fuses, then fuses can be reliably programmed, but the soak current required is high, increasing power consumption and heat
Solution Approach 1:
The patent changes the electrical parameters of the fuse structure by using complementary fuse arrays with different threshold characteristics. By designing the BLN and BL0 fuses with complementary voltage thresholds, the system can achieve reliable programming at lower currents. The differential reading approach also allows for lower individual fuse currents since the combined signal provides better noise margin.
3Area of stationary object
If fuse arrays are positioned in one location to save space, then device area is reduced, but reading accuracy may be affected by localized conditions
Solution Approach 1:
The patent segments the fuse storage function into two complementary arrays (BLN and BL0) that can be positioned in the same physical location but operate independently. This segmentation allows both arrays to share the same compact location while maintaining independent reading paths, thereby preserving reading consistency despite localized conditions affecting both fuses equally.
Data Source
AI summary
A circuit may include a first switch to pre-charge a first voltage line to a first voltage for a first amount of time, such that the first voltage is an opposite polarity as compared to a second voltage coupled to the first voltage line when a first fuse is blown. The circuit may also include a second switch to pre-charge a second voltage line to a third voltage for the first amount of time, such that the third voltage is an opposite polarity as compared to a fourth voltage coupled to the second voltage line when a second fuse is blown. The circuit also includes a latch circuit to amplify a first voltage signal present on the first voltage line and amplify a second voltage signal present on the second voltage line after the first amount of time expires.