Differential Hysteresis Receiver Without Feedback Path Delay

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing differential hysteresis receivers suffer from excessive path delay due to feedback from the receiver output stage to the input stage, limiting their frequency performance and introducing noise immunity issues.

Innovation Solution

A delay-independent differential hysteresis receiver design that uses two parallel paths with dedicated offsets in the first receiver stage, eliminating the need for feedback from the output to the input and thus avoiding path delay limitations, and incorporating a hold circuit to generate the hysteresis output without transmission gates or level shifting.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If feedback from receiver output stage to input stage is used to achieve hysteresis, then noise immunity is improved, but path delay increases and frequency performance is limited

Engineering Contradiction:
Improvenoise immunityVSAvoidpath delay
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The receiver is divided into two independent parallel paths (first and second receiver paths) instead of using a single feedback path. Each path has its own comparator with dedicated offsets, eliminating the need for signal to travel through the output stage and back to the input stage, thus removing the feedback delay while maintaining hysteresis functionality.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A hold circuit is introduced as an intermediary element that receives inputs from both parallel comparator paths and generates the hysteresis output. This hold circuit mediates between the two parallel paths, combining their outputs without requiring feedback to the input stage, thereby achieving hysteresis without the associated delay.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If transmission gates are used in the feedback path, then hysteresis is achieved, but unwanted coupling from control terminals to output occurs

Engineering Contradiction:
Improvehysteresis functionalityVSAvoidunwanted coupling
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The transmission gates are completely removed from the receiver architecture. Instead of using transmission gates in the feedback path, the patent employs two parallel comparator paths with dedicated offsets and a hold circuit to achieve hysteresis, thereby eliminating the source of unwanted coupling from control terminals to output.

Inventive Principle:
Principle #2Taking out (Extraction)

3Adaptability or versatility

If level shifters are added to drive transmission gates, then voltage level differences are accommodated, but path delay increases

Engineering Contradiction:
Improvevoltage level compatibilityVSAvoidpath delay
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

Level shifters are removed from the architecture by eliminating the transmission gate-based feedback approach. The parallel comparator paths with dedicated offsets and the hold circuit directly handle voltage level differences without requiring additional level shifting stages, thereby reducing path delay while maintaining voltage level compatibility.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS11070198B2Loop independent differential hysteresis receiver
Publication Date: 2021.07.20 STMICROELECTRONICS INT NV
  • US11070198B2 patent drawing
  • US11070198B2 patent drawing
  • US11070198B2 patent drawing

AI summary

A delay independent differential hysteresis receiver. The differential hysteresis receiver uses two parallel paths in a first receiver stage, each path having a comparator with a dedicated offset on the complimentary inputs. A second receiver stage includes a hold circuit that brings the two parallel paths of the first receiver stage together to form a receiver hysteresis output.