Differential PGIA Circuit With Resistor Strings for Low-Distortion ADC Gain
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional analog-to-digital converter (ADC) systems face issues with signal distortion, linearity, drift, and speed due to the trade-offs required in amplifier design for high-resolution ADCs, often compromising on desirable characteristics like high input impedance, variable scaling, and common-mode signal rejection due to physical, circuit, and financial limitations.
Innovation Solution
A programmable gain input amplifier (PGIA) architecture featuring a first stage with a pair of junction gate field-effect transistor (JFET) input amplifiers, a selection circuit, and multiple resistor strings allows for high impedance, variable gain, and common-mode rejection, coupled with a second stage differential amplifier for fully differential output, using precision matched resistors to achieve improved linearity and noise performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional amplifiers are used to scale input signal to ADC sensing range, then signal scaling is achieved, but signal distortion and data distortion occur
Solution Approach 1:
The amplifier is divided into two distinct stages: a first stage with JFET input amplifiers for high-precision signal conditioning and a second stage with differential amplifiers for output generation. This segmentation allows each stage to be optimized for its specific function, with the first stage focusing on preserving signal integrity through high input impedance and the second stage handling differential conversion, thereby achieving accurate signal scaling without distortion.
2Adaptability or versatility
If single-ended to differential driver is used, then differential output is achieved, but linearity and drift issues arise
Solution Approach 1:
Different qualities are assigned to different stages: the first stage uses JFET amplifiers with high input impedance specifically for maintaining signal linearity during initial amplification, while the second stage uses differential amplifiers specifically for achieving accurate differential output. This local optimization of characteristics ensures that linearity is preserved in the critical first stage while the second stage handles the differential conversion requirement.
3Adaptability or versatility
If pair of operational amplifiers is used to drive fully differential output, then differential output is achieved, but circuit complexity increases
Solution Approach 1:
The circuit merges the functions of signal amplification and differential output generation into a unified two-stage architecture. The first stage JFET amplifiers and second stage differential amplifiers are coupled together to form an integrated system that achieves both high input impedance and fully differential output in a single coherent circuit design, reducing overall complexity compared to separate independent stages.
4Adaptability or versatility
If conventional amplifier design is used, then variable scaling is achieved, but common-mode signal rejection is compromised
Solution Approach 1:
The first stage JFET amplifiers act as an intermediary between the input signal and the second stage differential amplifiers. This intermediary stage conditions the signal with high common-mode rejection capability before it reaches the differential stage, allowing variable gain to be implemented in the second stage without compromising the common-mode rejection established by the first stage.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution provides high input impedance, improved linearity, and common-mode rejection, achieving integral nonlinearity error of ±2.5 ppm, signal-to-noise ratio of 98 dB, and gain error drift of ±6 ppm/°C over 0°C to 70°C, while simplifying the circuit design and using off-the-shelf components for cost-effective performance.
Implementation Method 1
a first stage with a pair of junction gate field-effect transistor (JFET) input amplifiers
Implementation Method 2
using precision matched resistors to achieve improved linearity and noise performance
Data Source
AI summary
The present disclosure provides a simplified, multiple-gain, front-end circuit for analog-to-digital converter systems. In an example, a front-end circuit for an analog-to-digital converter (ADC) can include first and second input amplifiers configured to receive an input signal, and a gain selection circuit coupled to the first input amplifier and the second input amplifier; the gain selection circuit comprising a plurality resistor strings, each resistor string including a plurality of resistors coupled in series, and wherein each string includes a first end node coupled to an output of the first input amplifier and a second end node coupled to an output of the second input amplifier.