Differential Signal Receiver Gating for Idle Power Reduction
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Solution Overview
Problem
Existing communication devices face issues with increased power consumption and malfunction due to current flow through resistors when valid signals are not received, even when data is not transmitted.
Innovation Solution
A receiving device with a transmitting circuit, amplifier, gate circuit, and count circuit that distinguishes between data transmission and idle states by counting constant signal sections and generating a reset signal to control power consumption and prevent malfunctions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the receiving device continuously processes differential signals, then signal reception reliability is maintained, but power consumption increases during idle periods
Solution Approach 1:
The receiving device dynamically changes its operational state based on signal detection. During active transmission, the device processes differential signals through the amplifier and gate circuit. During idle periods, the device transitions to a low-power state where the gate circuit blocks the amplified signal, preventing current flow through resistors while maintaining the ability to quickly resume signal processing when transmission resumes.
Solution Approach 2:
The device changes its electrical parameters based on the transmission state. When in idle mode, the gate circuit modifies the electrical conductivity of the signal path, effectively changing the resistance and current flow characteristics. This parameter change allows the device to reduce power consumption during idle periods while maintaining signal reception capability when needed.
2Measurement precision
If the receiving device operates continuously to detect valid signals, then signal detection accuracy is maintained, but malfunction risk increases during idle periods
Solution Approach 1:
The receiving device dynamically adjusts its operational mode based on detected signal presence. The count circuit monitors signal transitions and dynamically switches the gate circuit between conductive and blocking states. This dynamic operation ensures accurate signal detection during active periods while preventing malfunction conditions during idle periods by blocking current flow when no valid signals are present.
3Use of energy by moving object
If the gate circuit blocks the amplified signal during idle periods, then power consumption is reduced, but signal processing capability may be affected
Solution Approach 1:
The gate circuit operates periodically, switching between conducting and blocking states based on the transmission protocol. During active transmission periods, the gate conducts signals normally. During idle periods, the gate blocks signals to reduce power consumption. The count circuit detects the periodic nature of transmission and coordinates gate operation accordingly, ensuring signal processing capability is restored when transmission resumes.
Solution Approach 2:
The count circuit provides feedback about the transmission state to control the gate circuit. By counting signal transitions and detecting idle periods, the count circuit generates control signals that activate the gate circuit to block or conduct. This feedback mechanism ensures the gate circuit operates in sync with the transmission protocol, maintaining signal processing capability while reducing power consumption during idle periods.
Data Source
AI summary
A communication device includes a first device and a second device. The first device includes a transmitting circuit configured to output and transmit a differential signal including a first signal and a second signal to the second device using an input signal and an enable signal. The second device includes a first amplifier configured to receive the differential signal from the first device, a gate circuit configured to gate an output signal of the first amplifier based on a deactivated reset signal, and a count circuit configured to: (1) count a section in which a value of the differential signal is constant based on a clock signal and an output signal of the gate circuit and (2) generate an activated reset signal when the count of the section exceeds a threshold value.