Differential Data Receiver Circuit Without Reference Voltage Generator
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Solution Overview
Problem
Conventional data receivers for LVDS systems require multiple amplifiers and comparators, leading to increased chip size and power consumption, and necessitate a separate reference voltage generator.
Innovation Solution
A data receiver design that reduces the number of amplifiers and comparators by using a differential amplifier with a tail current and a switching circuit to supply current to output terminals based on indication signals, eliminating the need for a separate reference voltage generator.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple amplifiers and comparators are used in conventional data receivers, then data reception reliability is improved, but chip size and power consumption increase
Solution Approach 1:
The patent combines multiple amplifiers into a single differential amplifier and merges comparator functions into the same circuit block. The differential amplifier simultaneously performs amplification and comparison operations that previously required separate dedicated circuits, thereby reducing chip area while maintaining reception reliability through the differential signaling mechanism
Solution Approach 2:
The differential amplifier circuit is designed to perform multiple functions: it amplifies the differential input signals, compares them against reference voltages, and generates both first and second comparison outputs. This multi-functional design eliminates the need for separate amplifiers and comparators, reducing overall circuit complexity and chip size
2Reliability
If multiple amplifiers and comparators are used in conventional data receivers, then data reception reliability is improved, but power consumption increases
Solution Approach 1:
By merging multiple amplifier and comparator circuits into a single differential amplifier block, the patent reduces the total number of active components that consume power. The shared circuitry eliminates redundant power consumption while maintaining the necessary signal processing capabilities for reliable data reception
Solution Approach 2:
The differential amplifier performs multiple functions (amplification, comparison, signal conditioning) that previously required separate dedicated circuits. This multi-functionality reduces the total power consumption by eliminating redundant circuit operations while maintaining data reception reliability
3Measurement precision
If conventional data receiver circuitry is used, then data reception accuracy is maintained, but device complexity increases
Solution Approach 1:
The patent merges multiple discrete circuits (amplifiers, comparators, reference voltage generators) into a single integrated differential amplifier block. This consolidation reduces device complexity by eliminating interconnections and synchronization requirements between separate components while maintaining data reception accuracy through the inherent differential comparison mechanism
Solution Approach 2:
The patent extracts and eliminates the separate reference voltage generator circuit from the receiver design. The reference voltages are generated internally within the differential amplifier circuit itself, removing the need for external reference voltage sources and reducing overall device complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design reduces chip size and enables low-power operation by simplifying the circuitry and eliminating the need for a separate reference voltage generator, thereby enhancing efficiency and reducing power consumption.
Implementation Method 1
an amplifier configured to receive and amplify the amplitude modulated differential input signals, to output, differential output signals corresponding to a voltage difference between the received signals
Data Source
AI summary
A data receiver and a data receiving method in which the data receiver generates two comparison signals based on amplitude modulated differential input signals, amplifies the comparison signals, compares amplified signals, and outputs logic operation results based on the amplitude modulated differential input signals and the comparison signals, thereby detecting data bits. Accordingly, the number of necessary amplifiers and comparators is reduced and a separate reference voltage generator is not needed, so that chip size reduction and low-power operation is accomplished.