Differential Sensing Circuit Disconnects Data Lines to Reduce Power

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Solution Overview

Problem

The high power consumption in read operations of differential type non-volatile memory circuits due to the need to discharge and re-charge bit and data lines from a predetermined potential to ground and back, which increases energy usage.

Innovation Solution

The differential type non-volatile memory circuit disconnects the sensing circuit from the data line pair when logic states differ, preventing charge dumping and reducing input loading, thereby minimizing operation current and power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the bit line and data line are discharged to ground potential and pre-charged before each read operation, then the sense amplifier can establish differential input voltages to determine stored data, but the power consumption of the read operation increases

Engineering Contradiction:
Improvedata reading accuracyVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent applies dynamics by making the connection state between the sensing circuit and data line pair changeable rather than static. Switches are used to dynamically connect or disconnect the differential data line pair from the differential sensing circuit based on whether a read operation is being performed, allowing the system to adapt its power consumption characteristics to operational requirements

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent implements periodic action by establishing a cyclic pattern of connection and disconnection between the sensing circuit and data line pair. The system periodically connects the data line pair to the sensing circuit only during read operations, and disconnects during non-read periods, creating a rhythmic operational pattern that reduces average power consumption while maintaining data reading accuracy when needed

Inventive Principle:
Principle #19Periodic action

2Speed

If the differential sensing circuit remains connected to the differential data line pair during non-read operations, then the circuit is ready for immediate read operations, but the input loading of the sensing circuit increases and operation current rises

Engineering Contradiction:
Improveread operation readinessVSAvoidoperation current
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The patent applies dynamics by making the connection state between the sensing circuit and data line pair changeable rather than static. Switches are used to dynamically connect or disconnect the differential data line pair from the differential sensing circuit based on whether a read operation is being performed, allowing the system to adapt its power consumption characteristics to operational requirements

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent applies preliminary action by pre-positioning the data line pair in a disconnected state during non-read operations, and only connecting them immediately before read operations are needed. This preliminary disconnection prepares the system for low-power operation while allowing rapid transition to the connected state when read operations commence, achieving both power savings and operational readiness

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10930746B2Differential type sensing circuit with differential input and output terminal pair
Publication Date: 2021.02.23 EMEMORY TECH INC
  • US10930746B2 patent drawing
  • US10930746B2 patent drawing
  • US10930746B2 patent drawing

AI summary

A differential type non-volatile memory circuit comprising a differential sensing circuit, a differential data line pair, a memory cell array, and a differential bit line pair is provided. The differential sensing circuit has a differential input terminal pair and a differential output terminal pair. The differential data line pair is electrically connected to the differential input terminal pair of the differential sensing circuit. The memory cell array has at least one differential non-volatile memory cell configured to store data. The differential bit line pair is electrically connected between the memory cell array and the differential data line pair. When logic states of the differential output terminal pair start to be different in a read operation phase of the memory cell array, the differential sensing circuit and the differential data line pair are disconnected.