An asymmetric non-180-degree bending design reduces side frame width in flexible display devices.
A driving circuit layer simultaneously controls liquid crystal and electrophoretic sub-panels to enable multi-dimensional brightness adjustment.
A semiconductor memory device uses tapered conductive contacts to lower resistance at cross-point intersections.
Touch lines integrate with the encapsulation layer to eliminate light reflection from intersecting traces.
Separating the notification area power supply from the main display reduces manufacturing complexity and overall power consumption.
Specific heteroaryl boron compounds improve OLED efficiency and lifetime by reducing operating voltage through optimized energy level alignment.
Trenches in the insulating layer allow wider conductive wires to reduce resistance without increasing the non-display area border width.
Thermo-compression bonding aligns monolithic RGB nanowire LEDs on a carrier substrate to the display backplane, lowering defect density and power consumption.
Alternating n-type and p-type trenches form a super junction that lowers on-resistance while maintaining high voltage withstand capability.
Partition walls intercept sputtered material to prevent color gamut distortion and maintain high transmittance.
Programmable voltage tuners lower input voltage to fast IC dice, enabling their use in mixed-speed packages and reducing manufacturing costs from die scrapping.
Spring-shaped MEMS wiring replaces pick-and-place mounting and wire bonding, reducing time and cost while maintaining electrical connectivity.
A composite silicon nitride and oxide insulating structure covers the floating gate electrode to block hydrogen ion diffusion that degrades data retention.
Merging the transistor and capacitor gate electrodes into a single structure reduces sensor circuitry size and manufacturing complexity.
Interlayer organic film absorbs mechanical stress between rigid inorganic layers to prevent structural damage.
Partially overlapping first and second vias reduce the overlap area, preventing light leakage and increasing the pixel aperture ratio.
A configurable embedded memory system uses multiplexers to route data between cascaded and direct paths.
Toroidal microlenses steer light away from inner sub-pixels, mitigating cross-talk and reducing overexposure artifacts in high dynamic range imaging.
Longitudinal spacers covering transistor source and drain regions improve electrostatic control in 3D memory stacks while reducing manufacturing complexity.
Parallel source lines reduce MRAM cell size to 6 F2 and decrease parasitic resistance, solving the speed penalty from charging unselected bit lines.
Recessed notches in the photomask light-shielding portion prevent diffused reflection, ensuring uniform pattern width and preventing short circuits.
Display pixels emit light radiation captured by photosensors to optically capture fingerprints on a cover plate surface.
Side-contact electrodes eliminate deep etching and top electrode placement, resolving optical loss and heat dissipation bottlenecks in high-resolution displays.
Light-shielding walls between sub-pixel columns reduce visual range, preventing peeping without increasing display panel thickness.
Segmenting the display area with varying pixel densities accommodates sensors and leads, reducing non-display zones while maintaining uniform image quality.
Multi-layer reflective structure below LED chip reflects light and insulates electrodes, eliminating separate insulating layers to reduce complexity.
A boron-containing organic guest material paired with a dual-component host enables high-efficiency electroluminescence in display devices.
Plasma treatment trims resist profiles and removes residues, solving pattern fineness trade-offs in semiconductor manufacturing.
A semiconductor memory device uses a counter implanted well to reduce power consumption while maintaining high integration density.
A multi-layer charge-coupled photovoltaic device integrates electron storage and multiplication to generate power continuously.
Isostatic pressure uniformly compresses semiconductor wafers in a vacuum container, reducing cycle time and increasing yield by accommodating non-uniform parts.
Ion-beam etching creates surface irregularities on SMD LED molding material to enhance light extraction.
Heating plates and movable capillaries manage viscosity to pull a polymer precursor into the gap, preventing voids in high-density flip-chip assemblies.
Stacked fins with a reverse biased diode reduce static leakage current while maintaining high-scale integration.
Integrating ultrasonic fingerprint sensors within the display driving circuit layer reduces panel thickness and simplifies manufacturing.
An asymmetric charge trapping sidewall suppresses hot electron punch-through and reduces operation voltage in shrinking source-drain channels.
Segmented insulating blocks in stretchable display bridges reduce stress concentration and enhance flexibility.
OLED display device uses transmissive regions without light emitting structures to integrate camera modules, preventing damage from openings.
Segmented p-n junctions share voltage to reduce leakage, while the thyristor bypasses these regions to lower clamping voltage during discharge events.
Segregating LED and anti-ESD chips in separate housing zones eliminates light absorption, ensuring uniform brightness while maintaining ESD protection.
Segmenting the lead frame ground path electrically isolates the light source circuit, eliminating overvoltage diodes and reducing manufacturing complexity.
A color adjusting layer between electrodes manages electron and hole transport to tune emitted light color in organic displays.
Vertical interconnects in a stacked photoelectric film sensor reduce production steps and improve light use efficiency.
Segmented flexible interconnect layers reduce manufacturing costs and production time while maintaining high electrical connection reliability.
Multiple carrier substrates bonded by adhesive layers prevent wafer warpage and damage during thinning processes.
Island patterns in input sensing panels prevent static electricity damage and eliminate moiré interference through asymmetric electrode spacing.
An insulated heat dissipation pad formed from conductive layers improves thermal management and prevents voltage breakdowns in optoelectronic devices.
A capacitance touch structure integrates parallel conductive electrodes into an electro-wetting display substrate to enable coordinate detection.
A 2-stack organic light emitting display structure uses a transition metal oxide layer to generate and passivate charges between stacked emission units.
Oscillated ultraviolet laser beams create precise groove lines in glass panels, reducing heat impact and edge damage during substrate separation.
Grooves in the pixel defining layer disperse impact stresses to prevent display defects while maintaining thin panel flexibility.
Adjusting verify voltage for adjacent cell data reduces inter-cell interference and improves writing reliability.
Multi-layer stack with air void reduces parasitic capacitance disturbance and increases switching speed.
A triple-layer pad electrode uses a low-reducibility barrier to prevent silver particle re-precipitation during etching.
A silicon carbide MOSFET fabrication method uses masked ion implantation to form a p-type deep layer extending beyond the trench gate.
Adhering pulverized carbon to metal powder creates a composite wick with enhanced hydrophilicity and thermal pathways.
A fingerprint sensor detects reflected light from a user's finger using a display panel with integrated optical sensing capabilities.
Segmenting select gates into regions with distinct lengths reduces gate-induced drain leakage and minimizes punch-through risks during read operations.
An asymmetric 45-degree rotation of sub-pixel groups relative to mask plate openings reduces the shadow effect, enhancing aperture ratio and pixel resolution.
An access transistor limits capacitance dump spike currents during ReRAM programming, preventing solid electrolyte damage and enhancing device reliability.