ReRAM Diode Impurity Gradient for Scattering Loss

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Solution Overview

Problem

The challenge in reducing the size of semiconductor memory cells while maintaining high dimensional accuracy and minimizing current loss due to carrier scattering in ReRAM diodes, where increasing n-type impurity density improves current but increases scattering, and reducing it decreases current, creating a tradeoff.

Innovation Solution

The implementation of a diode structure with a lower n-type impurity density in the central semiconductor area and higher impurity density in adjacent areas perpendicular to the current flow direction, allowing for improved current flow with reduced scattering loss by providing additional carrier supply areas.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If the atom density of n-type impurity in the n−-type semiconductor area is increased to increase the tolerable value of current flowing in the forward direction, then the current capability is improved, but the carrier scattering increases and causes higher loss

Engineering Contradiction:
Improvecurrent capabilityVSAvoidcarrier scattering loss
Core Design Contradiction:
PowerVSLoss of energy

Solution Approach 1:

The patent applies local quality by creating different impurity density regions within the n−-type semiconductor area. The central region has lower n-type impurity atom density to reduce carrier scattering and energy loss, while the peripheral regions adjacent to the p+-type semiconductor area have higher impurity density to provide sufficient carriers for forward current flow. This spatial differentiation of impurity density allows the diode to simultaneously achieve low loss and high current capability.

Inventive Principle:
Principle #3Local quality

2Quantity of substance

If the cell size is reduced to increase memory density, then the storage density is improved, but the current loss due to carrier scattering increases

Engineering Contradiction:
Improvememory densityVSAvoidcurrent loss
Core Design Contradiction:
Quantity of substanceVSLoss of energy

Solution Approach 1:

The patent implements local quality by dividing the n−-type semiconductor area into regions with different impurity densities. The central region maintains low impurity density to minimize carrier scattering and reduce current loss, which is critical for small-scale high-density memory cells. The peripheral regions have higher impurity density to ensure sufficient carrier supply. This localized differentiation enables the memory cell to achieve high density while maintaining acceptable current characteristics.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This structure enables sufficient current flow with minimal loss, effectively addressing the tradeoff between current tolerance and scattering loss in ReRAM memory cells, particularly at sizes of several dozen nanometers.

Implementation Method 1

A carrier scattering increases at the same time, which increases the loss, when the tolerable value of the current flowing in the forward direction is increased by increasing an atom density of an n-type impurity in an n−-type semiconductor area

Methodology Applied
Scientific EffectCarrier scattering:

Data Source

PatentUS8335102B2Resistance change memory
Publication Date: 2012.12.18 KIOXIA CORP
  • US8335102B2 patent drawing
  • US8335102B2 patent drawing
  • US8335102B2 patent drawing

AI summary

A memory includes memory cells each includes a resistance change element and a diode. The diode comprises areas which is provided in order of a first semiconductor area with a first conductivity type, a second semiconductor area with the first conductivity type, and a third semiconductor area with a second conductivity type, from the column lines to the row lines. An atom density of impurities with the first conductivity type in the second semiconductor area is lower than that in the first semiconductor area. The diode comprises a fourth semiconductor area with the first conductivity type at an end portion in a third direction of the second semiconductor area, the third direction is perpendicular to a direction from the column lines to the row lines, and an atom density of impurities with the first conductivity type in the fourth semiconductor area is higher than that in the second semiconductor area.