Semiconductor Memory Verify Voltage Adjustment
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Solution Overview
Problem
In semiconductor memory devices, the miniaturization of memory cells leads to inter-cell interference due to parasitic capacitance, causing fluctuations in threshold voltages, which affects data writing reliability and accuracy.
Innovation Solution
The semiconductor memory device employs a control circuit that adjusts the verify voltage based on the data to be written to adjacent memory cells, setting it to a lower voltage when the adjacent cell's data corresponds to a lower threshold level, thereby reducing inter-cell interference and ensuring the target threshold voltage is achieved.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If memory cells are miniaturized to increase storage density, then the quantity of stored data increases, but inter-cell interference due to parasitic capacitance causes threshold voltage fluctuations that worsen writing reliability
Solution Approach 1:
The control circuit performs preliminary action by determining in advance whether an adjacent memory cell stores data corresponding to a lower threshold voltage level. Based on this preliminary determination, the verify voltage is adjusted before the actual writing operation to the target memory cell, thereby preventing threshold voltage fluctuations caused by inter-cell interference.
Solution Approach 2:
The invention applies parameter changes by dynamically adjusting the verify voltage level based on the data state of adjacent memory cells. When an adjacent cell contains data corresponding to a lower threshold voltage, the verify voltage is set to a lower level to compensate for the expected threshold voltage increase in the target cell, thus maintaining writing accuracy despite miniaturization-induced interference.
2Quantity of substance
If memory cells are miniaturized to increase storage density, then the quantity of stored data increases, but threshold voltage fluctuations worsen data writing accuracy
Solution Approach 1:
The control circuit changes the verify voltage parameter dynamically based on adjacent cell data states. When an adjacent cell stores data corresponding to a lower threshold voltage, the verify voltage is reduced to compensate for the anticipated threshold voltage increase in the target cell, thereby maintaining precise data writing accuracy even as memory cells are miniaturized.
Solution Approach 2:
The invention implements feedback by using the data state of adjacent memory cells as input information to determine the appropriate verify voltage level. This feedback mechanism allows the control circuit to adaptively adjust writing parameters based on the actual state of the memory array, ensuring accurate data writing despite variations caused by miniaturization.
3Device complexity
If a fixed verify voltage is used for data writing, then the device complexity is reduced, but threshold voltage fluctuations cause writing failures
Solution Approach 1:
The control circuit changes the verify voltage parameter based on adjacent cell data states, implementing a simple conditional adjustment logic. This approach maintains relatively low device complexity while significantly improving writing reliability by adapting the verify voltage to compensate for inter-cell interference effects.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the reliability of data writing by minimizing malfunctions caused by threshold voltage fluctuations, improving the accuracy and stability of data storage in densely packed memory cell arrays.
Implementation Method 1
the miniaturization of memory cells leads to inter-cell interference due to parasitic capacitance, causing fluctuations in threshold voltages
Data Source
AI summary
At a time of writing first data to a first memory cell, second data which is written later to an adjacent second memory cell is referred to, and when a value of the second data corresponds to a first threshold level, a verify voltage is set to a first verify voltage, and when the value of the second data corresponds to a second threshold level greater than the first threshold level, the verify voltage is set to a second verify voltage smaller than the first verify voltage.