SiC MOSFET Gate Oxide Breakdown Prevention via Deep Layer Doping
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Solution Overview
Problem
Silicon carbide (SiC) semiconductor devices with trench gate structures face challenges in reducing electric field concentration in the gate oxide layer, leading to potential breakdown, especially due to high voltages applied, which is exacerbated by the difficulty in aligning trench gates and p-type deep layers, and the need for high-energy ion implantation to achieve desired depths.
Innovation Solution
A method for forming a p-type deep layer that extends deeper than the trench by separating the formation of lower and upper layers through ion implantation, using masks to ensure alignment and reduce electric field concentration, thereby preventing gate oxide breakdown and improving yield rates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a trench gate structure is applied to SiC semiconductor to increase channel density, then the device can control larger electric current, but electric field concentration occurs at the trench corner leading to gate insulating film breakdown
Solution Approach 1:
The patent applies local quality by creating a p-type deep layer specifically at the trench corner region where electric field concentration occurs. This localized doping modification changes the electrical properties only in the critical area, reducing electric field concentration at the trench corner without affecting the overall trench gate structure and channel density.
2Reliability
If a p-type deep layer is formed by ion implantation to reduce electric field concentration, then gate oxide breakdown is prevented, but alignment between trench gate and p-type deep layer becomes difficult
Solution Approach 1:
The patent applies preliminary action by forming the p-type deep layer before creating the trench gate structure. This sequence allows the deep layer to be positioned in advance, and subsequent trench formation naturally aligns with it, eliminating the alignment difficulties that would occur if the trench were formed first and the deep layer attempted to be positioned afterward.
3Reliability
If high-energy ion implantation is used to form p-type deep layer at desired depth, then electric field concentration is reduced, but high-energy ion implantation equipment is required
Solution Approach 1:
The patent applies partial action by using multiple low-energy ion implantation steps instead of a single high-energy implantation. The first implantation introduces p-type dopants to a certain depth, and subsequent implantations add more dopants, progressively building up the p-type deep layer at the desired depth without requiring high-energy equipment.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method effectively reduces electric field concentration in the gate oxide layer, preventing breakdown and improving the reliability and yield of SiC semiconductor devices, without the need for high-energy ion implantation equipment, and allows for better alignment between trench gates and p-type deep layers.
Implementation Method 1
performing ion implantation to form a deep layer extending deeper than a bottom wall of the trench gate
Data Source
AI summary
In a method of making a silicon carbide semiconductor device having a MOSFET, after a mask is placed on a surface of a first conductivity type drift layer of silicon carbide, ion implantation is performed by using the mask to form a lower layer of a deep layer extending in one direction. A first conductivity type current scattering layer having a higher concentration than the drift layer is formed on the surface of the drift layer. After another mask is placed on a surface of the current scattering layer, ion implantation is performed by using the other mask to form an upper layer of the deep layer at a position corresponding to the lower layer in such a manner that the lower layer and the upper layer are connected together.