Focal Plane Array Packaging via Isostatic Pressure
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Solution Overview
Problem
Current methods for packaging focal plane arrays, such as flip chip cold compression bonding and reflow bonding, face challenges including high costs, reduced yield, and limited throughput due to stringent flatness requirements and thermal expansion mismatches, especially when dealing with infrared detector materials.
Innovation Solution
The use of isostatic pressure in a vacuum-sealed container to uniformly compress semiconductor wafers, allowing for rapid hybridization of multiple die simultaneously, which reduces cycle time, increases throughput, and is more forgiving of part inconsistencies, enabling efficient interconnect formation without the need for precise flatness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If flip chip cold compression bonding is used to attach detector die to ROIC die, then mechanical and electrical interconnect is formed, but the process requires very flat die which decreases yield of incoming components and increases cost
Solution Approach 1:
The patent changes the bonding parameter from room temperature cold compression to elevated temperature (e.g., 150°C to 250°C) bonding. This temperature increase enables the formation of reliable interconnects without requiring extremely flat die surfaces, as the thermal energy facilitates better contact and bonding across the interface, thereby reducing the stringency of flatness requirements while maintaining interconnect reliability.
2Reliability
If cold compression pressing is applied at high points of detector wafer, then bonding is achieved, but bonding time increases and cost increases due to need for sufficient deformation
Solution Approach 1:
The patent applies elevated temperature during the bonding process, which accelerates the bonding kinetics and reduces the time required to achieve reliable interconnection. The thermal energy promotes faster diffusion and bonding at the interface, eliminating the need for prolonged compression times that would otherwise be required to achieve sufficient deformation and interconnection reliability.
3Productivity
If reflow bonding is used for wafer level hybridization, then throughput is increased, but the process is not compatible with IR materials due to mismatch in coefficient of thermal expansion
Solution Approach 1:
The patent modifies the bonding temperature parameter to be lower than traditional reflow bonding temperatures, specifically targeting a range (150°C to 250°C) that is compatible with infrared detector materials. This adjusted temperature parameter enables wafer-level batch processing of IR materials without causing thermal expansion mismatch damage, thereby maintaining high throughput while achieving material compatibility.
4Reliability
If oxide and/or metallic bonding is used to connect multiple die, then interconnect is formed, but the process is not compatible with IR materials particularly column III-V materials due to material incompatibility with high temperatures
Solution Approach 1:
The patent employs elevated temperature bonding within a specific range (150°C to 250°C) that is high enough to enable reliable interconnect formation through diffusion and bonding mechanisms, but low enough to be compatible with temperature-sensitive IR materials including column III-V materials. This optimized temperature parameter achieves both reliable interconnect formation and material compatibility.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly reduces cycle time and costs, enhances yield by accommodating non-uniform parts, and prevents damage from high thickness variations or particle contamination, while allowing for downstream processing like substrate removal and testing.
Implementation Method 1
applying isostatic pressure to the package in the pressure chamber
Implementation Method 2
applying isostatic pressure to the package in the pressure chamber
Implementation Method 3
packaging the semiconductor bodies in a vacuum sealed container having flexible walls
Data Source
Figure 1
Figure 2
Figure 3A~3C
AI summary
A method for bonding a first semiconductor body (10) having a plurality of electromagnetic radiation detectors to a second semiconductor body (14) having read out integrated circuits for the detectors. The method includes: aligning electrical contacts (17) for the plurality of electromagnetic radiation detectors with electrical contacts (18) of the read out integrated circuits; tacking the aligned electrical contacts for the plurality of electromagnetic radiation detectors with electrical contacts of the read out integrated circuits to form an intermediate stage structure; packaging the intermediate stage structure into a vacuum sealed electrostatic shielding container (22) having flexible walls; inserting the package with the intermediate stage structure therein into an isostatic pressure chamber (24); and applying the isostatic pressure to the intermediate stage structure through walls of the container. The container includes a stand-off to space walls of the container from edges of the first semiconductor body.