Digital DLL Clock Stretcher for Glitch-Corrected Pulse Timing
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Solution Overview
Problem
Conventional clock stretchers require a clean power supply and struggle with glitches due to finite DLL bandwidth and phase detector offset, leading to timing violations and functional failures in systems with variable load conditions.
Innovation Solution
A clock stretcher system that includes a sense unit, a delay-locked loop (DLL), and a control unit to dynamically adjust the clock frequency based on sensed power conditions, using a digital DLL to proactively compensate for glitches by lengthening output clock pulses and modifying the delay line length to prevent timing errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a digital DLL is used to overcome clean power supply requirements, then power consumption is reduced and adaptability to variable load conditions is improved, but glitches occur due to discrete time steps causing shortened clock pulses
Solution Approach 1:
The patent detects when the digital DLL is about to make an adjustment and proactively lengthens the clock pulse before the adjustment occurs. This preliminary action prevents the glitch that would otherwise occur when the discrete time step adjustment shortens the pulse, thereby maintaining timing accuracy while using a digital DLL for adaptability
2Reliability
If an analog DLL is used to maintain stable delay, then reliability is improved, but a dedicated clean power supply is required increasing device complexity
Solution Approach 1:
The patent replaces the analog DLL's continuous-time feedback mechanism with a digital DLL's discrete-time operation. By using digital logic and algorithms to control the delay line, the system eliminates the need for a dedicated clean power supply while maintaining sufficient delay stability for clock stretching operations
3Stability of the object's composition
If DLL bandwidth is limited to ensure stability, then stability is improved, but the DLL cannot keep up with fast supply voltage changes reducing responsiveness
Solution Approach 1:
The patent implements a feedback mechanism that monitors the digital DLL's internal clock and detects when adjustments are made. This feedback allows the system to proactively compensate for upcoming glitches by lengthening clock pulses in advance, enabling the DLL to respond to voltage changes without compromising stability
Data Source
AI summary
A clock stretcher includes a digital DLL that derives delayed versions of an input clock signal, and a combiner that cyclically selects the delayed versions to generate a modified clock signal. The combiner uses a hop code, dependent on a sensed condition, to determine the step size for the cyclical selection. The digital DLL corrects its delay speed at discrete times, during which it may be active. If the DLL delay line becomes slower while it is active, the modified clock signal would incur a glitch. The clock stretcher corrects for this glitch by using an increased hop code when a speed change occurs. The clock stretcher may operate from a sensed power supply without intervening voltage regulation.