Digital Error Amplification Without External Capacitors

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Solution Overview

Problem

Conventional pulse width modulation (PWM) and pulse frequency modulation (PFM) control systems for error amplification and processing require external capacitors, which increase cost and reduce reliability due to the need for large capacitance values that cannot be incorporated into integrated circuits, especially for low-frequency signal applications.

Innovation Solution

A system and method for error amplification and processing that includes a signal processing unit generating a digital pulse signal based on the difference between a reference and feedback signal, a counter generating a counter output signal, and a digital-to-analog converter producing an output signal, allowing for high-precision signal amplification and conversion within an integrated circuit without external capacitors, using a modulation control system with low capacitance values.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional PWM/PFM control systems use external capacitors for error amplification, then system stability can be maintained, but device complexity and manufacturing cost increase due to requiring large capacitance values that cannot be integrated

Engineering Contradiction:
Improvesystem stabilityVSAvoidexternal component requirements
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent replaces the conventional external capacitor-based error amplification mechanism with a digital signal processing approach using a signal processing unit, counter, and digital-to-analog converter. This substitution eliminates the need for large external capacitors while maintaining the error amplification function and system stability, directly resolving the contradiction between reliability and device complexity.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent fundamentally changes the operating parameters of the error amplification system by transitioning from analog continuous amplification to digital pulse-based amplification. The signal processing unit generates digital pulse signals whose frequency corresponds to the error magnitude, and the counter accumulates these pulses to achieve precision amplification. This parameter change enables integration without requiring large external capacitors.

Inventive Principle:
Principle #35Parameter changes

2Stability of the object's composition

If large capacitance values are used for low-frequency signal compensation, then loop stability is achieved, but manufacturing cost increases due to inability to integrate such capacitors into ICs

Engineering Contradiction:
Improveloop compensation stabilityVSAvoidintegration capability
Core Design Contradiction:
Stability of the object's compositionVSEase of manufacture

Solution Approach 1:

The patent substitutes the physical large-capacitance compensation mechanism with a digital compensation approach. The signal processing unit processes error signals by generating frequency-modulated digital pulses, and the counter integrates these pulses to provide low-bandwidth loop compensation equivalent to large capacitor behavior, but implementable entirely within standard IC technology.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent transitions the compensation mechanism from the time-domain continuous charging/discharging of large capacitors to a frequency-domain digital pulse counting approach. By mapping error magnitude to pulse frequency and using counter accumulation, the system achieves the same low-frequency compensation effect without the physical constraints of large capacitor integration.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Measurement precision

If external capacitors are required for error amplification, then adequate signal processing is achieved, but manufacturing cost and assembly complexity increase

Engineering Contradiction:
Improvesignal amplification precisionVSAvoidmanufacturing cost
Core Design Contradiction:
Measurement precisionVSEase of manufacture

Solution Approach 1:

The patent replaces external capacitor-based analog amplification with a fully integrated digital signal processing chain. The signal processing unit converts analog error signals to digital pulse trains, the counter provides precise accumulation and amplification, and the digital-to-analog converter reconstructs the amplified signal. This substitution maintains measurement precision while eliminating external components and reducing manufacturing cost.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent merges multiple previously separate functions (error amplification, signal integration, and compensation) into a single integrated digital signal processing unit. By combining the signal processing unit, counter, and digital-to-analog converter into one integrated block, the system achieves adequate signal processing precision without requiring external capacitors, thereby reducing manufacturing cost and assembly complexity.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS11936351B2Systems and methods for error amplification and processing
Publication Date: 2024.03.19 ON BRIGHT INTEGRATIONS CO INC
  • US11936351B2 patent drawing
  • US11936351B2 patent drawing
  • US11936351B2 patent drawing

AI summary

System and method for error amplification and processing. For example, the system includes: a signal processing unit configured to receive a reference signal and a feedback signal and generate a digital pulse signal, a frequency of the digital pulse signal being associated with a difference between the reference signal and the feedback signal; a counter configured to receive the digital pulse signal and generate a counter output signal based on at least information associated with the digital pulse signal; and a digital-to-analog converter configured to receive the counter output signal and generate an output signal based on at least information associated with the counter output signal.