Direct Digital Frequency Synthesis Without Off-Chip Filters
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Solution Overview
Problem
Existing direct digital synthesis methods require fast high-resolution DACs and multi-pole low-pass filters, leading to increased size and cost due to the need for external components, and suffer from reduced accuracy due to approximation in computing carry signal delays.
Innovation Solution
A digital frequency generation method that integrates a direct digital frequency synthesizer onto a simple chip, eliminating the need for off-chip filters, using an accumulator, selector, digital-to-analog converter, and comparator to generate a pulse stream with a desired frequency relative to a reference clock signal, without requiring a lookup sine table or low-pass filter.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a lookup sine table and low-pass filter are used in direct digital synthesis, then signal generation accuracy over a wide frequency range is improved, but device size and cost increase due to external components
Solution Approach 1:
The patent extracts and eliminates the low-pass filter from the direct digital synthesis system, replacing it with a digital pulse stream generation method that inherently produces the desired frequency without requiring external filtering components
Solution Approach 2:
The accumulator and selector circuitry are designed to perform multiple functions: generating the output frequency, controlling the DAC timing, and eliminating the need for separate filter components, thereby reducing overall device complexity
2Measurement precision
If a fast high-resolution DAC and multi-pole low-pass filter are used, then signal generation accuracy is improved, but manufacturing cost increases due to precision discrete components
Solution Approach 1:
The patent removes the multi-pole low-pass filter from the system, eliminating the need for precision discrete components and reducing manufacturing complexity
Solution Approach 2:
The patent uses a simpler DAC configuration that does not require fast high-resolution specifications, allowing for the use of lower-cost, less precise components while still achieving the desired frequency generation accuracy
3Device complexity
If the accumulator carry signal delay is computed using approximation, then circuit complexity is reduced, but output frequency accuracy deteriorates
Solution Approach 1:
Instead of approximating the carry signal delay and accepting frequency errors, the patent inverts the approach by using the exact remainder value from the accumulator to directly control the selector, which then precisely determines the DAC conversion timing to achieve accurate output frequency without approximation
Solution Approach 2:
The patent uses the accumulator remainder value as feedback to control the selector state, which in turn precisely controls the DAC timing, creating a closed-loop system that maintains accurate frequency generation without requiring complex delay computation circuits
Data Source
AI summary
An opportunity is apparent to develop alternative circuitry. Simplified circuitry without artifacts tied to the clock that drives a digital frequency generator (DFG) is useful in a variety of tunable electronic devices. The present invention relates to digital frequency generation. In particular, it relates to a method and apparatus for the digital generation of a pulse stream having a desired frequency relative to a reference clock signal and the ratio of two integers. The method applies generally to integers whose ratio is not an integer. The DFG as a device can be integrated onto a simple chip, without need for an off-chip filter.