Digital Isolator Test Mode for Glitch and Bit-Miss Detection

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Solution Overview

Problem

Digital isolators experience issues with missed bits and glitches due to reduced transmitter drive strength and susceptibility to noise, especially at higher data rates, which are not effectively addressed by existing testing methods.

Innovation Solution

A digital isolator system that includes a transmitter, voltage regulator, isolator, and glitch detection circuit, capable of entering a test mode to simulate voltage drops and detect glitches using a low-bandwidth test system, and a glitch detection circuit that forces the output to a static logic level upon glitch detection.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If high data rates are used to increase productivity, then data transmission speed is improved, but transmitter drive strength is reduced and glitches increase

Engineering Contradiction:
Improvedata transmission speedVSAvoidtransmitter drive strength
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies preliminary action by performing glitch detection testing before final product certification. A test mode is activated that forces the transmitter into a low-drive-strength state ahead of time, allowing potential glitches to be detected and corrected before the product is certified for high-speed operation.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes the drive strength parameter of the transmitter by activating a test mode that forces reduced drive strength. This parameter change allows the system to simulate worst-case scenarios and detect glitches that would occur at high data rates without actually operating at those high speeds during testing.

Inventive Principle:
Principle #35Parameter changes

2Measurement precision

If complex testing methods are used to detect glitches, then measurement precision is improved, but device complexity increases

Engineering Contradiction:
Improveglitch detection accuracyVSAvoidtesting system complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent uses copying by creating a test mode that replicates the electrical conditions of high-speed operation without actually running at high speeds. The test controller copies the essential characteristics of high-rate data transmission (reduced drive strength) while using a simple low-bandwidth test system, avoiding the need for complex high-speed testing equipment.

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The patent applies universality by designing a test mode that can detect both glitches and missed bits using a single low-bandwidth test system. The test controller performs multiple functions (glitch detection, missed bit detection, and drive strength characterization) without requiring specialized high-speed testing equipment for each function.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Ease of operation

If existing testing methods are used to reduce device complexity, then ease of operation is improved, but measurement precision deteriorates

Engineering Contradiction:
Improvetesting simplicityVSAvoidglitch and missed bit detection accuracy
Core Design Contradiction:
Ease of operationVSMeasurement precision

Solution Approach 1:

The patent applies self-service by having the digital isolator test itself through an integrated test mode. The device under test generates its own test conditions by activating the test controller, which forces the transmitter into low-drive-strength mode and enables the glitch detection circuit. This self-testing capability eliminates the need for complex external testing equipment while maintaining high measurement precision.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS12493074B2Test mode for glitch detection and bit miss in a digital isolator
Publication Date: 2025.12.09 TEXAS INSTRUMENTS INC
  • US12493074B2 patent drawing
  • US12493074B2 patent drawing
  • US12493074B2 patent drawing

AI summary

An apparatus includes a transmitter, a voltage regulator, an isolator, and a test controller. The transmitter has an input, an output, and a first supply voltage terminal. The input couples to the apparatus' input terminal. The voltage regulator's input couples to a second supply voltage terminal. The voltage regulator's output couples to the first supply terminal. The first terminal of the isolator couples to the output of the transmitter. A first test controller terminal couples to the second supply voltage terminal. A second test controller terminal couples to the input terminal of the apparatus. The first control output couples to the control input of the voltage regulator. The test controller changes a logic state of a control signal at the first control output from a first logic state to a second logic state.