Thermometer-Coded Digital Step Attenuator for Zero-Glitch Switching

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Solution Overview

Problem

Digital Step Attenuators (DSAs) experience signal glitches during transitions between attenuation stages, leading to undesirable signal level variations that can damage components, cause feedback loops to malfunction, or result in signal distortion, due to the large binary steps and poor linearity in existing solutions.

Innovation Solution

A thermometer-coded DSA architecture with independently operated transistors and resistors, allowing for smooth monotonic transitions by adjusting the state of each transistor independently, reducing the need for additional hardware and minimizing impedance mismatch.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If binary-coded attenuation stages are used in DSAs, then the device complexity is reduced, but signal glitches occur during transitions causing large signal level variations

Engineering Contradiction:
Improveattenuator structureVSAvoidsignal stability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent segments the attenuation transition process into multiple sequential micro-steps by dividing the total attenuation change into smaller increments. Each micro-step transitions a fraction of the total attenuation value, allowing the signal to progress gradually from one attenuation level to another rather than jumping directly, thereby eliminating glitches while maintaining binary-coded efficiency

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent prepares intermediate attenuation states in advance during the transition process. Before completing the full attenuation change, the system temporarily establishes intermediate attenuation levels that bridge the gap between initial and final states, ensuring continuous signal stability throughout the transition sequence

Inventive Principle:
Principle #10Preliminary action

2Reliability

If additional hardware is added to eliminate glitches, then signal stability is improved, but the device complexity increases

Engineering Contradiction:
Improvesignal stabilityVSAvoidcircuit components
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements dynamic control of the attenuation transition process by sequentially enabling and disabling attenuation stages during the transition. The system dynamically adjusts which attenuation stages are active at each micro-step, allowing smooth signal progression without requiring additional static hardware components to suppress glitches

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent uses the existing attenuation stages to serve dual purposes: both providing the desired attenuation levels and facilitating glitch-free transitions. The same binary-coded attenuation stages that provide signal attenuation also enable the micro-stepping transition mechanism, eliminating the need for separate dedicated glitch-reduction hardware

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS12063020B2Zero glitch digital step attenuator
Publication Date: 2024.08.13 MACOM TECH SOLUTIONS HLDG INC
  • US12063020B2 patent drawing
  • US12063020B2 patent drawing
  • US12063020B2 patent drawing

AI summary

A digital step attenuator (DSA) cell and related method are provided. The DSA cell includes a first branch comprising a first resistor connected, at a first side, to an input port and, at a second side, to an output port; a second resistor connected, at a first side, to the first resistor and, at a second side, to a first transistor and a third resistor connected, at a first side, to the first resistor and, at a second side, to a second transistor. Also included in the DSA cell is a second branch, in a parallel configuration with the first resistor, that includes a fourth resistor and a third transistor. Also included is a third branch, in a parallel configuration with the first resistor, that includes a fourth transistor. The first transistor, the second transistor, the third transistor, and the fourth transistor are configured to be operated independently.