Digital Signal Timing Memory Read Circuit Reduces Power

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Solution Overview

Problem

Existing memory devices face high power consumption during information read-out, which is detrimental for mobile devices and leads to reduced reliability and increased bit cell size due to the need for lower supply voltages.

Innovation Solution

The solution involves evaluating memory element information using digital signals rather than analogue signaling, where the information is transformed into a specific relation of two digital signals with predetermined properties, such as edges, slopes, or timing, allowing for lower power consumption and reduced susceptibility to component properties.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If analogue circuitry is used to evaluate memory element information, then measurement precision is improved, but power consumption increases

Engineering Contradiction:
Improveinformation evaluation accuracyVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent replaces the mechanical/electrical analogue sensing system with a digital timing-based system. Instead of using analogue circuitry to measure and compare voltage or current levels, the invention uses digital signal timing relationships to encode and decode memory information, thereby eliminating the high power consumption associated with analogue sensing while maintaining measurement precision through temporal encoding

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent changes the parameter used for information encoding from voltage or current levels (analogue parameters) to signal timing relationships (temporal parameters). By encoding information in the timing relationships between digital signals rather than in amplitude levels, the system achieves precise information evaluation with significantly reduced power consumption, as digital timing circuits consume far less power than analogue sensing and comparison circuitry

Inventive Principle:
Principle #35Parameter changes

2Use of energy by moving object

If supply voltage is lowered to reduce power consumption, then power savings are achieved, but reliability deteriorates

Engineering Contradiction:
Improvepower consumptionVSAvoiddevice reliability
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The patent replaces voltage-level-dependent analogue sensing with a digital timing-based detection system that is insensitive to supply voltage variations. The timing relationships between digital signals remain stable even when supply voltage changes, allowing the system to maintain high reliability at lower operating voltages where analogue systems would fail due to reduced signal margins and increased noise susceptibility

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Measurement precision

If analogue sensing sensitivity is maintained at lower voltages, then measurement precision is preserved, but device dimensions must increase

Engineering Contradiction:
Improvesensing sensitivityVSAvoidbit cell size
Core Design Contradiction:
Measurement precisionVSArea of moving object

Solution Approach 1:

The patent replaces large analogue sensing amplifiers and reference circuits with compact digital timing logic elements. The digital timing-based sensing mechanism requires only simple logic gates and signal delay elements to detect memory states, reducing the bit cell area by orders of magnitude compared to conventional analogue sensing circuitry while maintaining or improving sensing sensitivity through precise temporal measurement

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentEP2089887B1Read enhancement for memory
Publication Date: 2015.12.23 NXP BV
  • EP2089887B1 patent drawingFigure 1
  • EP2089887B1 patent drawingFigure 2
  • EP2089887B1 patent drawingFigure 3

AI summary

An electronic circuitry is provided for reading out a memory element (ME). The electronic circuitry comprises a first electronic path (IP) being coupled to the memory element (ME), a second electronic path (RP) having predetermined electrical properties, and a basic detection element (BDE) being coupled to the first and second electronic paths (IP, RP) such that the information contained in the memory element (ME) can be determined by the basic detection element (BDE) based on the relation of a digital signal being propagated over the first path (IP) to a digital signal being propagated over the second path (RP).