Switched-Capacitor Digital Transmitter Linearization at High Output Power
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Solution Overview
Problem
Conventional wireless transmitter architectures face challenges in achieving high linearity and efficiency, particularly at high output power levels and wide bandwidths, due to the large area and high power consumption of analog and RF components, which limits their suitability for modern communication standards like 5G and IoT applications.
Innovation Solution
The implementation of a digital transmitter with a switched capacitor circuit that includes a plurality of unit cells, where each cell is electrically coupled via a switch to either a drive or reference voltage, and control signals are applied to transition the switches between on and off states with temporally shifted edges to reduce switching resistance, along with partitioning unit cells into subsets to manage source resistance and employing offset mid-tread code mapping to enhance linearity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If conventional analog and RF functions are used in wireless transmitters, then linearity and output power are improved, but area and power consumption increase significantly
Solution Approach 1:
The patent replaces conventional analog and RF circuitry with a digital transmitter architecture using a switched capacitor circuit. This substitution of analog mechanical/electrical systems with digital switching mechanisms achieves high output power and linearity while dramatically reducing area and power consumption, as digital circuits can be densely integrated in CMOS technology
Solution Approach 2:
The switched capacitor circuit performs multiple functions including digital-to-analog conversion, signal modulation, and power amplification within a single integrated circuit block. This multi-functionality eliminates the need for separate analog and RF sub-blocks, reducing overall transmitter area while maintaining high output power capability
2Manufacturing precision
If conventional analog and RF functions are used in wireless transmitters, then linearity is improved, but power consumption increases significantly
Solution Approach 1:
The patent replaces power-hungry analog and RF circuitry with a digital switched capacitor architecture that consumes significantly less power. The digital switching mechanism achieves high linearity through precise control of capacitor switching时序, eliminating the need for continuous analog signal processing that consumes excessive power
Solution Approach 2:
The switched capacitor circuit uses periodic switching of capacitors to achieve continuous signal processing with discrete, low-power operations. By switching capacitors in synchronized phases with the RF signal, the circuit maintains high linearity while consuming power only during switching events rather than continuously
3Productivity
If high-order QAM and OFDM modulation schemes are used to increase data rates, then spectral efficiency is improved, but peak-to-average power ratio increases forcing operation in deep power back-off region
Solution Approach 1:
The patent implements dynamic control of the switched capacitor circuit to handle the high peak-to-average power ratio of high-order QAM and OFDM signals. The circuit dynamically adjusts its operation to accommodate signal peaks without requiring excessive back-off, enabling high data rates while maintaining efficient power utilization through adaptive switching control
4Ease of operation
If conventional transmitter architecture is used, then analog signal processing is simplified, but area and static current consumption increase even at low output power
Solution Approach 1:
The patent replaces analog signal processing circuits with a digital switched capacitor implementation that performs the same functions. This substitution maintains ease of operation through digital control while dramatically reducing area and eliminating static current consumption, as digital circuits only draw power during active switching operations
Solution Approach 2:
The patent extracts and eliminates the need for separate analog and RF sub-blocks by integrating their functions into a single switched capacitor circuit. This extraction of essential functions into a unified digital architecture reduces area and static power consumption while maintaining signal processing capability
Data Source
AI summary
Different techniques are presented for achieving enhanced linearity of digital transmitters. In one aspect, each unit cell of a switched capacitor circuit includes a capacitor electrically coupled via a switch to one of a drive voltage or a reference voltage, and the switch is implemented by two transistors coupled in series. The two transistors are transitioned between on and off states by control signals applied to control terminals of the two transistors, such that the control signals are pulse waves with edges temporally shifted in relation to each other and thereby reducing switching resistance during switch transitions.