Diode-Connected MOS Transistor for Capacitor Voltage Stress Reduction
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Solution Overview
Problem
Conventional one-time programmable (OTP) memory devices are prone to unintentional programming due to high voltage stress across capacitors, leading to potential breakdown and corruption of memory cells.
Innovation Solution
Incorporating a metal-oxide-semiconductor (MOS) diode-connected transistor (MDT) in each memory cell, controlled by a control signal, which is serially connected to word line transistors and control transistors, to reduce voltage stress across capacitors during access operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional OTP memory device structure is used, then device simplicity is maintained, but voltage stress across capacitor increases leading to unintentional programming
Solution Approach 1:
The patent introduces a diode-connected transistor as an intermediary component between the capacitor and the bit line. This transistor acts as a protective mediator that limits the maximum voltage stress across the capacitor to below the breakdown threshold, thereby preventing unintentional programming while allowing normal read operations to proceed.
Solution Approach 2:
The diode-connected transistor is pre-configured in the memory cell circuit before any programming or read operations occur. It provides beforehand protection by clamping the voltage across the capacitor to safe levels, cushioning the capacitor against harmful voltage stress that could cause breakdown during normal bit line precharging operations.
2Reliability
If diode-connected transistor is added to reduce voltage stress, then capacitor protection is improved, but device complexity increases
Solution Approach 1:
The diode-connected transistor serves multiple functions simultaneously: it protects the capacitor from overvoltage stress, enables normal read operations, and can be integrated into existing memory cell architectures. This multi-functionality justifies the added complexity by providing comprehensive protection without requiring separate protection circuits.
Solution Approach 2:
The patent merges the protection function with the existing memory cell structure by using a diode-connected transistor that can be integrated alongside the existing access transistors and capacitor. This combining approach minimizes the increase in device complexity compared to adding a completely separate protection mechanism.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The use of MDTs effectively reduces the voltage drop across capacitors in unselected memory cells, minimizing the risk of capacitor breakdown and ensuring data integrity.
Implementation Method 1
Incorporating a metal-oxide-semiconductor (MOS) diode-connected transistor (MDT) in each memory cell, controlled by a control signal, which is serially connected to word line transistors and control transistors, to reduce voltage stress across capacitors during access operations
Data Source
AI summary
A memory device and a method of operating a memory device are disclosed. In one aspect, the memory device includes a plurality of non-volatile memory cells, each of the plurality of non-volatile memory cells is operatively coupled to a word line, a gate control line, and a bit line. Each of the plurality of non-volatile memory cells comprises a first transistor, a second transistor, a first diode-connected transistor, and a capacitor. The first transistor, second transistor, first diode-connected transistor are coupled in series, with the capacitor having a first terminal connected to a common node between the first diode-connected transistor and the second transistor.