Temperature Sense Diode Pad Layout for Short-Circuit Isolation

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Solution Overview

Problem

Existing semiconductor devices face challenges in preventing short circuits between anode and cathode pads due to poor coverage of interlayer dielectric films, leading to residue formation and potential electrical connections.

Innovation Solution

The semiconductor device design includes a configuration where the anode and cathode pads do not overlap with the gate runner, and a metal electrode is provided to cover the exposed interlayer dielectric film, preventing short circuits and ensuring proper isolation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If the interlayer dielectric film coverage is reduced, then the manufacturing complexity is decreased, but short circuits between anode and cathode pads occur

Engineering Contradiction:
Improveinterlayer dielectric film coverageVSAvoidelectrical isolation between pads
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The gate runner serves as an intermediary structure that provides mechanical support and defines the spacing between anode and cathode pads. By positioning the gate runner between the pads, it acts as a physical barrier that prevents residue formation and maintains electrical isolation without requiring extensive interlayer dielectric film coverage.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The solution transitions from relying on vertical dielectric film coverage to using horizontal spacing defined by the gate runner structure. By establishing separation in the lateral dimension through the gate runner's physical presence, the patent achieves electrical isolation without depending on thick or extensive dielectric layers.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Area of stationary object

If the gate runner is positioned closer to the pads, then the device area is reduced, but residue formation increases causing potential short circuits

Engineering Contradiction:
Improvedevice areaVSAvoidresidue formation
Core Design Contradiction:
Area of stationary objectVSObject-generated harmful factors

Solution Approach 1:

The gate runner is positioned as an intermediary element between the pads, creating a controlled interface region. This positioning allows the gate runner to intercept and contain residue formation at its interface with the pads, preventing residue from bridging the anode and cathode pads while maintaining compact device dimensions.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Ease of manufacture

If the anode and cathode pads overlap with the gate runner, then the manufacturing process is simplified, but short circuits occur due to poor isolation

Engineering Contradiction:
Improvepad and gate runner alignmentVSAvoidelectrical isolation
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The device structure is segmented into distinct functional zones: the gate runner region, the anode pad region, and the cathode pad region. By clearly separating these zones and preventing overlap, the patent maintains manufacturing simplicity while ensuring reliable electrical isolation through the inherent physical separation created by the gate runner's position.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS20260076180A1Semiconductor device and semiconductor circuit
Publication Date: 2026.03.12 FUJI ELECTRIC CO LTD
  • US20260076180A1 patent drawing
  • US20260076180A1 patent drawing
  • US20260076180A1 patent drawing

AI summary

There is provided a semiconductor device including: a semiconductor substrate which has an upper surface; a temperature sense diode which is arranged above the upper surface of the semiconductor substrate; an anode pad which is arranged above the upper surface of the semiconductor substrate, and which is connected to an anode of the temperature sense diode; a cathode pad which is arranged above the upper surface of the semiconductor substrate, and which is connected to a cathode of the temperature sense diode; a gate pad which is arranged above the upper surface of the semiconductor substrate; and a gate runner which is arranged above the upper surface of the semiconductor substrate, and which is connected to the gate pad, in which an entire region between the anode pad and the cathode pad does not overlap with the gate runner.