Direct Feed-Forward LDO Regulator for Fast Stable On-Chip Power
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Solution Overview
Problem
Conventional LDO regulators require external power supplies due to limitations in integrating a 2.5 V gate oxide device on a chip, necessitating high current consumption and stability issues, and rely on external capacitors for stabilization, which complicates integration and increases power consumption.
Innovation Solution
A low-power fast-transient LDO regulator with direct feed-forward architecture, utilizing a one-stage differential amplifier and parasitic capacitance for stabilization, eliminating the need for external components and reducing current requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional LDO regulators use external power supplies and external capacitors for stabilization, then stability and regulation performance are improved, but device complexity and integration difficulty increase
Solution Approach 1:
The patent combines the LDO regulator and power supply circuit into a single integrated circuit block, eliminating the need for external power supplies and external capacitors. The regulator circuit directly integrates all necessary components including the error amplifier, pass transistor, and compensation capacitance on the same chip, achieving full integration while maintaining stable operation
Solution Approach 2:
The patent introduces an intermediate compensation capacitance connected between the error amplifier output and ground, which serves as a mediator to stabilize the feedback loop. This internal compensation mechanism replaces external capacitors and provides the necessary phase margin for stable operation without requiring external components
2Reliability
If conventional LDO regulators use external capacitors for stabilization, then system stability is improved, but power consumption increases
Solution Approach 1:
The regulator circuit uses its own internal resources to achieve stabilization. The compensation capacitance is generated and maintained within the regulator block itself, and the error amplifier uses internal biasing circuits to provide the necessary gain and phase margin, eliminating the need for power-hungry external stabilization components
Solution Approach 2:
The patent optimizes the parameters of internal transistors and capacitances to achieve stable operation with lower power consumption. By carefully designing the transconductance of the error amplifier and the value of the compensation capacitance, the circuit achieves adequate phase margin while minimizing quiescent current draw
3Measurement precision
If conventional LDO regulators use three-stage op-amp architecture with closed-loop feedback, then regulation accuracy is improved, but feed-forward bandwidth is limited and stability becomes challenging
Solution Approach 1:
The patent segments the regulation function into two independent paths: a feed-forward path that provides fast transient response and a feedback path that ensures DC accuracy. The feed-forward amplifier operates independently with high bandwidth, while the feedback loop operates at lower frequencies to maintain stability, allowing each path to be optimized for its specific function without compromising the other
Solution Approach 2:
The patent replaces the conventional three-stage op-amp closed-loop feedback system with a direct feed-forward amplifier architecture. This substitution eliminates the stability limitations and bandwidth constraints of multi-stage feedback amplifiers by using a simpler, direct amplification path that inherently provides high bandwidth and fast transient response
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution provides a stable, low-power LDO regulator that can be integrated on a chip, maintaining competitive power consumption and achieving fast transient responses without external capacitors, thus simplifying integration and reducing power depletion.
Implementation Method 1
a direct feed-forward (DFF) loop formed by the PMOS transistor and its parasitic gate-to-drain capacitance during a load transient
Data Source
AI summary
A low-dropout (LDO) regulator includes a voltage reference node and a one-stage differential amplifier coupled to the voltage reference node. The one-stage differential amplifier includes: a differential pair of NMOS transistors; a mirroring load comprising a first current source and a PMOS transistor; a direct feed-forward (DFF) loop formed by the PMOS transistor and its parasitic gate-to-drain capacitance during a load transient; and an indirect regulation feedback (IRF) loop formed by the differential pair of NMOS transistors, a resistor, and the PMOS transistor to provide direct current (DC) voltage regulation.