Discharging Circuit Stabilizes Semiconductor Memory Read Current

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Solution Overview

Problem

Resistance change memory devices face reliability issues due to unintended voltage stress on memory cells caused by residual electric charges in interconnections after operations like read or state changes, leading to variations in read current and potential state changes during power cycles.

Innovation Solution

A semiconductor memory device with a discharging circuit connected to interconnections to clear accumulated electric charges before subsequent operations, ensuring that memory cells are not subjected to unintended voltage or current, thereby stabilizing the read current and improving reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If a resistance change memory is used to achieve high integration density, then memory capacity increases, but reliability deteriorates due to unintended voltage stress from residual charges

Engineering Contradiction:
Improvememory capacityVSAvoidmemory cell state stability
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The discharging circuit performs preliminary discharge of residual electric charges from interconnections after each read or state change operation. By clearing charges before the next operation or power cycle, the invention prevents unintended voltage stress on memory cells, thereby maintaining state stability while enabling high integration density

Inventive Principle:
Principle #10Preliminary action

2Device complexity

If interconnections retain residual electric charges after operations, then circuit simplicity is maintained, but harmful voltage stress acts on memory cells

Engineering Contradiction:
Improvecircuit structureVSAvoidvoltage stress on memory cell
Core Design Contradiction:
Device complexityVSObject-affected harmful factors

Solution Approach 1:

The discharging circuit extracts and removes residual electric charges from interconnections after operations. By selectively discharging only the necessary interconnections (bit lines or word lines) based on operation type, the invention eliminates harmful voltage stress while adding minimal circuit complexity

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The discharging circuit acts as an intermediary component between the memory cell array and the read/write circuitry. It mediates the removal of residual charges without interfering with normal read/write operations, thereby protecting memory cells from voltage stress while maintaining overall system functionality

Inventive Principle:
Principle #24Intermediary (Mediator)

3Ease of operation

If a p-channel transistor is used to drive normal voltage, then ease of operation improves, but reliability worsens due to unintended discharge of accumulated charge

Engineering Contradiction:
Improvetransistor operationVSAvoidmemory cell state stability
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The discharging circuit applies preliminary anti-action by discharging residual charges before they can cause harmful effects during power cycles or next operations. This prevents the unintended state changes that would otherwise occur due to charge discharge through p-channel transistors

Inventive Principle:
Principle #9Preliminary anti-action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The implementation of a discharging circuit effectively reduces variations in read current and enhances the reliability of read operations by preventing unintended state changes in memory cells, addressing the reliability concerns associated with residual charges.

Implementation Method 1

a discharging circuit connected to the interconnection, discharges electric charge accumulated in the interconnection after a first operation of applying the voltage to the memory cell is ended and before a second operation of applying the voltage to the memory cell next is started

Methodology Applied
Scientific EffectElectric charge discharge: Electrostatic Discharge

Data Source

PatentUS8363448B2Semiconductor memory device
Publication Date: 2013.01.29 KIOXIA CORP
  • US8363448B2 patent drawing
  • US8363448B2 patent drawing
  • US8363448B2 patent drawing

AI summary

According to one embodiment, a semiconductor memory device includes a memory cell, a power supply circuit, an interconnection and a discharging circuit. The memory cell includes a variable resistance element whose resistance varies by application of a voltage. The power supply circuit outputs the voltage to be applied to the memory cell. The interconnection is formed between the power supply circuit and the memory cell and supplies the voltage output from the power supply circuit to the memory cell. The discharging circuit is connected to the interconnection. The discharging circuit discharges electric charge accumulated in the interconnection after a first operation of applying the voltage to the memory cell is ended and before a second operation of applying the voltage to the memory cell next is started.