Discrete 3D Vertical Memory Segmentation
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Solution Overview
Problem
Integrated three-dimensional vertical memory (3D-MV) designs face challenges in cost, performance, and size due to full integration, which forces a simple peripheral circuit to use expensive manufacturing processes and high-temperature materials, leading to increased costs and degraded performance.
Innovation Solution
A discrete 3D-MV design separates the 3D circuit and 2D peripheral circuit into different dice, allowing for independent optimization of back-end-of-line structures, using fewer and faster interconnect materials for the peripheral circuit, thereby reducing costs and improving performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If full integration is used to combine peripheral circuit and memory array in a single die, then device complexity is reduced, but manufacturing cost increases and performance degrades due to expensive processes and high-temperature materials
Solution Approach 1:
The patent divides the memory device into two separate dice: a first die containing the memory array and a second die containing the peripheral circuit. This segmentation allows each die to be optimized independently for its specific function, enabling the use of appropriate manufacturing processes and materials for each component without being constrained by the requirements of the other die.
Solution Approach 2:
The peripheral circuit is extracted from the memory array die and placed on a separate die. This extraction removes the constraint that forced the simple peripheral circuit to use expensive manufacturing processes and high-temperature materials, allowing the peripheral circuit die to be manufactured more cost-effectively while maintaining full functionality when the dice are combined.
2Device complexity
If full integration is used to combine peripheral circuit and memory array in a single die, then device complexity is reduced, but performance degrades due to expensive processes and high-temperature materials
Solution Approach 1:
By segmenting the device into separate dice optimized for their specific functions, the peripheral circuit can use manufacturing processes and materials appropriate for its requirements rather than being forced to use the expensive, high-temperature processes required by the memory array. This results in improved performance and reliability of the peripheral circuit while maintaining the integrated functionality of the complete device.
3Ease of manufacture
If separate dice are used for memory array and peripheral circuit, then manufacturing cost decreases and performance improves, but device complexity increases
Solution Approach 1:
The two separate dice are vertically stacked and bonded together, with the peripheral circuit die positioned beneath the memory array die. This nested arrangement integrates the functionality of both separate dice into a compact structure that resembles a single integrated device, minimizing the increase in device complexity while maintaining the cost and performance benefits of separate manufacturing.
Data Source
AI summary
The present invention discloses a discrete three-dimensional vertical memory (3D-MV). It comprises at least a 3D-array die and at least a peripheral-circuit die. The 3D-array die comprises a plurality of vertical memory strings. At least an off-die peripheral-circuit component of the 3D-MV arrays is located on the peripheral-circuit die instead of the 3D-array die. The 3D-array die and the peripheral-circuit die have substantially different back-end-of-line (BEOL) structures.