Display Pixel Capacitor Layout for Thin High-Capacitance Panels
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Solution Overview
Problem
Current display apparatuses face challenges in achieving high-quality image display while maintaining a thin and lightweight design, particularly in the efficient integration of transistors and capacitors that affect the display's performance and capacitance.
Innovation Solution
The display apparatus incorporates a specific structure with transistors and a storage capacitor, featuring semiconductor layers, gate electrodes, insulating layers, and barrier metal layers, including titanium, to optimize the overlap and connection of electrodes and insulating layers for improved capacitance and reduced parasitic capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Weight of moving object
If the display apparatus is made thinner and lighter, then portability and modern design are improved, but the integration of transistors and capacitors becomes more difficult while maintaining sufficient capacitance
Solution Approach 1:
The patent merges the storage capacitor structure with the transistor structure by sharing common electrodes and insulating layers. The first electrode of the storage capacitor is formed integrally with the source electrode of the first transistor, and the second electrode shares the gate electrode structure, thereby reducing the number of discrete components and simplifying the overall device integration in thin display apparatuses
Solution Approach 2:
The gate electrode structure serves dual functions: as the control electrode for the transistor operation and as the second electrode of the storage capacitor. This multi-functionality reduces the number of separate components needed, making the device thinner and lighter while maintaining both transistor functionality and sufficient capacitance
2Reliability
If the capacitance is increased to improve display performance, then image quality is improved, but the device size and weight increase
Solution Approach 1:
The patent utilizes the vertical dimension by forming overlapping electrode structures in the thickness direction. The first electrode and second electrode of the storage capacitor are positioned at different vertical levels with insulating layers in between, enabling capacitance enhancement through vertical stacking rather than horizontal expansion, thus maintaining a thin profile while increasing capacitance
3Reliability
If the capacitance is increased by enlarging capacitor area, then capacitance is improved, but the available area for other components is reduced
Solution Approach 1:
The storage capacitor utilizes the vertical stacking dimension with overlapping electrodes positioned at different heights, separated by insulating layers. This three-dimensional arrangement increases the effective capacitor area without consuming additional planar space, allowing sufficient capacitance while maintaining compact component layout
Solution Approach 2:
The capacitor electrodes are merged with the transistor electrodes, where the gate electrode serves as one electrode of the storage capacitor and the source/drain electrodes form the other electrode. This merging allows the capacitor functionality to be integrated within the transistor footprint area, maximizing space utilization
4Productivity
If parasitic capacitance is reduced to improve switching performance, then transistor operation is improved, but the manufacturing precision requirements increase
Solution Approach 1:
The insulating layers are formed preliminarily between the electrode structures during the fabrication process, establishing proper electrical isolation before subsequent electrode patterning. This preliminary formation of insulating barriers prevents unwanted parasitic capacitance while maintaining manageable manufacturing precision requirements through systematic process sequencing
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the display's performance by increasing capacitance, simplifying manufacturing, and reducing unwanted capacitance, leading to improved image quality and operational efficiency.
Implementation Method 1
a storage capacitor electrically connected to the first transistor and the second transistor and including a first electrode and a second electrode, the first electrode and the second electrode overlapping each other in a plan view
Implementation Method 2
a first insulating layer between the lower electrode and the first electrode, and a second insulating layer on the second semiconductor layer and the first electrode
Data Source
AI summary
A display apparatus includes a first transistor including a first semiconductor layer, a first gate electrode overlapping a first channel area of the first semiconductor layer, a second transistor including a second semiconductor layer, a second gate electrode overlapping a second channel area of the second semiconductor layer, a storage capacitor electrically connected to the first and second transistors and comprising a first and second electrodes overlapping each other, wherein the second electrode of the storage capacitor includes a lower electrode below the first electrode and an upper electrode above the first electrode, the lower electrode and the upper electrode being electrically connected to each other, the second semiconductor layer includes a first area and a second area spaced apart from each other with the second channel area therebetween, and the first electrode of the storage capacitor is disposed in the second area of the second semiconductor layer.