Display Device Scan Line Branched Routing for Bezel Reduction

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Solution Overview

Problem

Existing organic light emitting display devices have a significant dead space due to the placement of drivers outside the pixel area, which increases the bezel width and reduces display efficiency.

Innovation Solution

The display device minimizes dead space by rearranging the layout of scan lines, emission control lines, and power lines within the peripheral area, using branched lines and optimized power source voltages to reduce the number of lines in the peripheral area, and incorporating a scan driver and emission driver between the pixel area and the peripheral area.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If drivers are disposed in the peripheral area outside the pixel area, then the pixel area can be dedicated solely to pixels, but the dead space of the display device is increased

Engineering Contradiction:
Improvepixel areaVSAvoiddead space
Core Design Contradiction:
Area of stationary objectVSLoss of substance

Solution Approach 1:

The patent merges the driver area with the pixel area by disposing scan drivers and emission drivers within or overlapping the pixel area, rather than separating them in the peripheral area. This integration eliminates the dead space that would otherwise be created by having drivers outside the pixel area, while still providing dedicated pixel regions.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent utilizes the vertical dimension by disposing drivers at different heights or layers within the display structure. By placing drivers in overlapping regions or at different vertical positions, the patent achieves both dedicated pixel areas and minimized dead space through three-dimensional spatial arrangement.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Ease of manufacture

If drivers are disposed in the peripheral area, then pixel layout is simplified, but the bezel width is increased

Engineering Contradiction:
Improvepixel layoutVSAvoidbezel width
Core Design Contradiction:
Ease of manufactureVSLength of stationary object

Solution Approach 1:

The patent combines the driver disposition with the pixel area layout, allowing drivers to be integrated within or overlapping the pixel area. This merging enables simplified pixel layout while simultaneously reducing the bezel width by eliminating the need for separate peripheral driver areas that would increase the overall display dimensions.

Inventive Principle:
Principle #5Merging (Combining)

3Loss of substance

If the number of lines in the peripheral area is reduced, then dead space is minimized, but line routing complexity increases

Engineering Contradiction:
Improvedead spaceVSAvoidline routing
Core Design Contradiction:
Loss of substanceVSDevice complexity

Solution Approach 1:

The patent resolves the line routing complexity by utilizing the vertical dimension and overlapping regions. Lines are routed through multiple layers or at different vertical positions, allowing reduced dead space with manageable routing complexity through three-dimensional space management rather than two-dimensional plane constraints.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent employs nested routing where lines are arranged in hierarchical layers, with certain lines positioned at different vertical levels. This nesting approach allows efficient use of space by placing lines in overlapping or nested configurations, minimizing dead space while maintaining organized routing through multiple hierarchical levels.

Inventive Principle:
Principle #7Nested doll (Nesting)

Data Source

PatentUS11621315B2Display device
Publication Date: 2023.04.04 SAMSUNG DISPLAY CO LTD
  • US11621315B2 patent drawing
  • US11621315B2 patent drawing
  • US11621315B2 patent drawing

AI summary

Disclosed is a display device, including: a substrate including a pixel area and a peripheral area; pixels provided in the pixel area as a plurality of pixel rows and a plurality of pixel columns; data lines configured to provide a data signal; scan lines configured to provide a scan signal; first power lines configured to provide a power source to the pixel columns; and a second power line connected to the first power lines and disposed in the peripheral area. A scan line connected to an ith pixel row may apply a scan signal to the ith pixel row, and a branched line branched from the scan line may apply an initialization signal to a kth pixel row (k≠i). A branched point of the scan line is disposed between a pixel most adjacent to the second power line of the ith pixel row and the second power line.