Display Data Driving Circuit for Stable Signal Transitions
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Solution Overview
Problem
Display devices experience deterioration in display quality due to issues with data signal transitions, leading to unwanted noise and meta-stable states that affect image clarity.
Innovation Solution
A data driving circuit with a transition detector, delay compensator, and level shifter to manage data signal transitions by delaying specific bits based on pattern recognition and count signals, ensuring stable voltage levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If data signal transitions are processed without delay compensation, then processing speed is maintained, but display quality deteriorates due to noise and meta-stable states
Solution Approach 1:
The transition detector identifies problematic transition patterns in advance before they cause display quality deterioration. By detecting patterns where multiple bits change simultaneously (meta-stable states) and preemptively applying delay compensation, the system prevents noise and display artifacts rather than correcting them afterward, thus maintaining reliability while minimizing time loss.
Solution Approach 2:
The delay compensator acts as an intermediary component between the latch and output circuit. It selectively delays specific data bits based on transition patterns detected by the transition detector, mediating the conflict between fast processing and high reliability by introducing minimal, targeted delays only where needed to prevent display quality issues.
2Reliability
If delay compensation is applied to all data bits, then display quality is improved, but processing complexity increases
Solution Approach 1:
The delay compensator applies delay compensation selectively to specific data bits based on transition patterns, rather than uniformly to all bits. The control signal generated by the transition detector identifies which bits require delay (those involved in problematic transitions), allowing the delay compensator to apply compensation locally only where needed, thus improving display quality without unnecessarily increasing circuit complexity.
Solution Approach 2:
The system applies partial delay compensation only to the extent necessary to prevent display quality deterioration. Rather than compensating all data bits equally, the transition detector identifies specific transition patterns that cause issues and applies delay compensation only to those cases, avoiding excessive action and reducing overall circuit complexity while maintaining reliability.
3Object-affected harmful factors
If transition detection and delay compensation are implemented, then noise is reduced, but device complexity increases
Solution Approach 1:
The transition detector operates in advance to identify problematic transition patterns before they manifest as noise in the display output. By detecting patterns such as simultaneous multi-bit transitions (meta-stable states) and triggering delay compensation preemptively, the system reduces noise effectively while keeping circuit complexity manageable through targeted rather than universal processing.
Solution Approach 2:
The transition detector and delay compensator work as intermediary components between the data latch and output circuit. They selectively intervene only when problematic transition patterns are detected, adding minimal complexity by using simple pattern recognition logic and selective delay control rather than complex noise filtering circuits that would process all data continuously.
Data Source
AI summary
A data driving circuit including: a latch which receives an output image signal and outputs a latch data signal including a plurality of bits; a transition detector which compares the latch data signal of a current line with the latch data signal of a previous line, and outputs a first transition detection signal based on the comparison; a delay compensator which outputs a delay data signal obtained by delaying some of the plurality of bits of the latch data signal based on the first transition detection signal; a level shifter which outputs a level shift data signal obtained by changing a voltage level of the delay data signal; and an output circuit which converts the level shift data signal into a data signal and provides the data signal obtained by converting the level shift data signal to a data line.