Static Indicating Devices TRIZ Cases

Light-blocking bank layers and segmented sub-dams cut reflection, limit residual-film defects, and improve mask alignment in display fabrication.

Gradually reducing sub-pixel group density across profiled panel regions smooths signal-line load changes and cuts visible luminance differences.

A stepped dam and recessed insulating layers guide organic material flow to keep OLED thin film encapsulation uniform and protect touch panel quality.

A host material with lower triplet energy enables TTA delayed fluorescence, raising EL emission efficiency while cutting power use.

An auxiliary power pattern overlaps the sealing region to absorb curing heat, prevent circuit defects, and shrink OLED non-display areas.

Segmented overlapping wires and a dielectric layer cut planar capacitance and RC load in large UHD display panels.

Defect mapping and luminance redistribution repair faulty micro-LED subpixels with spare subpixels, cutting material cost while preserving display quality.

Grooves etched in the exposed semiconductor layer boost light extraction while avoiding a separate patterning step and added display cost.

Visualizing the autonomous merge abort point in advance helps drivers understand handover timing and prepare for braking or manual control.

Hybrid silicon and oxide TFTs plus shared opening formation simplify flexible display panel fabrication while improving reliability and cost.

A silicon-oxide transistor layout links initialization and driving TFTs to stabilize pixel circuits, cut power use, and improve luminance.

A shield layer tied to constant voltage traces blocks drive-to-gate interference in OLED panel fan-out routing, reducing abnormal display issues.

Bonding microcontrollers and LEDs on one substrate replaces TFT backplanes, cutting cost, leakage, and power use while preserving precise control.

A shared OLED and photodiode stack lets one subpixel both emit and detect light, raising resolution and aperture ratio while cutting process steps.

Gate-capacitor voltage control corrects transistor current variation in light-emitting circuits, reducing luminance unevenness with fewer wirings.

A high-transmissivity display region placed over the sensor improves light transmission while preserving overall display brightness and resolution.

Bank patterns, layered electrodes, and selective insulation improve pixel alignment, light emission efficiency, and parasitic capacitance control.

An overlapping color filter and color conversion layer cuts mask steps, reduces dead space, and guides light with lower loss.

A shield wire placed between the data line and driving transistor absorbs capacitive noise, preserving OLED display quality at high resolution.

Shortest-path converging wires and segmented shielding blocks cut charge buildup at OLED panel shielding edges, reducing ESD damage.

A shared auxiliary subpixel lets adjacent pixels use one repair element, cutting LED count, layout area, and display manufacturing cost.

Etched grooves in the exposed semiconductor layer boost light extraction while avoiding a separate patterning step in display manufacturing.

Stacked first and second power lines shield data lines, cut IR drop and parasitic capacitance, and improve display image quality.

Series-parallel LED grouping and separate voltage lines cut driving power while enabling independent color control and field sequence display.

A tapered first electrode balances signal loading and connection reliability to raise AMOLED pixel luminance and display quality.

Ambient-light detection circuits let the driver IC track effective display length in real time for accurate image control during roll-up and unroll.

Embedded photodetectors let a micro-LED panel sense ambient light, fingerprints, and proximity while preserving thinness and high contrast.

A layered glass display with LTPS driver circuits and oxide pixel transistors enables large high-definition panels beyond silicon wafer size limits.

Stacked non-overlapping micro LED substrates preserve passive-drive brightness through light refraction while enabling high-definition display at lower cost.

Accommodating slots, a seam-covering display module, and clear adhesive remove black edges and dark seam shadows in spliced panels.

Pixel-level micro-LEDs use wavelength conversion to generate red, green, and white light while cutting backlight power and display cost.

Combining bottom-gate oxide, top-gate oxide, and polysilicon transistors cuts leakage, widens drive range, and improves OLED pixel reliability.

A metal bonding layer joins the Micro-LED chip wafer to the color conversion substrate, blocking light leakage while improving strength and yield.

An offset pixel opening and overlapping reference line balance parasitic capacitance to reduce side color shift and improve OLED brightness uniformity.

Separating quantum-dot and organic light-emitting layers by pixel improves light extraction and avoids losses caused by sequential stacking.

Branch data lines on a separate layer overlap pixel electrodes to balance parasitic capacitance and suppress LCD crosstalk.

Dummy electrodes on a symmetric driving circuit board absorb micro-LED alignment errors and speed large-area display transfer.

A barrier film over a soft foam cushion improves foldable display impact resistance while preserving surface quality and avoiding visible defects.

Shared discharge bars and split sub-pixel areas improve viewing angles in DLS display panels while keeping data-line and IC counts low.

A semi-transmissive layer and microcavity layout boost color purity and light extraction while lowering display power use.

Pre-aligned conductive particles and an insulating pad structure prevent pad-to-pad shorts while improving display connector bonding reliability.

Dummy openings release hydrogen from semiconductor layers, keeping TFT characteristics uniform across inorganic LED displays.

A moving RGB scan needle projects image portions onto a screen, cutting LED count, power use, and display manufacturing complexity.

Insulating layers and offset openings let side wires link front and rear data pads while reducing short-circuit defects in tiled displays.

Region-specific driver placement keeps one-to-one pixel driving while freeing space for under-screen photosensitive elements and preserving display uniformity.

Intersecting power lines linked by via holes form a common-electrode grid that reduces voltage drop and improves display uniformity.

Bottom-gate oxide transistors and a silicon emission-control transistor reduce leakage and hysteresis, improving grayscale control and flicker.

A layered side-wire and pad layout limits residue overlap at openings, reducing adjacent data pad shorts in tiled displays.

A higher-transmittance pixel area above the sensor improves under-display light reception despite wires and electronic elements in the screen.

Aligned weak light-emitting areas and tilted sapphire surfaces help micro LED pixels preserve brightness and white balance across viewing angles.