Gate Driving Panel Circuit Layout for Stable High-Low Voltage Supply
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Solution Overview
Problem
Existing display devices face issues with degraded image quality due to improper gate driving, which can be exacerbated by inadequate signal and power supply to the gate driving panel circuit.
Innovation Solution
A gate driving panel circuit is integrated into the display panel (GIP type) with separate power line areas for gate high and low voltages, along with scan and clock signal lines, ensuring stable signal and power delivery to the gate lines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If gate driving panel circuit is integrated into display panel with shared power line area, then device complexity is reduced, but signal and power supply stability deteriorates
Solution Approach 1:
The power line area is divided into a first power line area for high voltage lines and a second power line area for low voltage lines, with the gate driving panel circuit area separated from both. This segmentation prevents voltage interference and maintains signal stability while keeping the integrated structure.
Solution Approach 2:
Different regions of the display panel are assigned different functions: the first power line area carries high voltage, the second power line area carries low voltage, and the gate driving panel circuit area processes signals. This local differentiation ensures each component operates in its optimal electrical environment.
2Reliability
If separate power line areas for high and low voltages are implemented, then signal and power supply stability is improved, but device complexity increases
Solution Approach 1:
The high voltage lines, low voltage lines, clock signal lines, and scan signal lines are merged into a unified wiring structure within the display panel, with power and signal lines organized in distinct but integrated areas. This reduces the need for separate external connections while maintaining stability.
3Object-affected harmful factors
If gate driving panel circuit area is separated from power line areas, then electromagnetic interference is reduced, but area utilization decreases
Solution Approach 1:
The display panel is organized into multiple horizontal bands: display area, clock signal line area, gate driving panel circuit area, first power line area, and second power line area. This dimensional arrangement separates interfering signals in the vertical dimension while maintaining compact horizontal integration.
Data Source
AI summary
The present disclosure relate to a gate driving panel circuit, a display panel and a display device that are capable of stably supplying high voltages and low voltages by disposing the gate driving panel circuit in a display panel and applying a stable power wiring structure.