Subpixel Circuit Layout for Stable OLED Luminance and Low Crosstalk
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Solution Overview
Problem
The variability in electrical characteristics of driving transistors across subpixels in organic light emitting display devices leads to luminance deviations, which are not adequately addressed by existing image quality compensation technologies, resulting in defects like crosstalk due to parasitic capacitance during internal compensation.
Innovation Solution
A subpixel circuit design that stabilizes the source voltage of driving transistors by connecting organic light emitting diodes with a common anode structure, incorporating a driving transistor with specific nodes and a control circuit to manage operations, and utilizing a storage capacitor to maintain voltage levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If internal compensation method is used to control driving timing, then luminance deviation is reduced, but gate-source voltage changes due to parasitic capacitance causing crosstalk defects
Solution Approach 1:
A compensation transistor is introduced as an intermediary component between the driving transistor and the data line. This transistor specifically compensates for threshold voltage variations by generating a compensation voltage that offsets the parasitic capacitance effects, thereby eliminating crosstalk defects while maintaining luminance uniformity.
Solution Approach 2:
The patent changes the electrical parameters of the transistor circuit by introducing additional transistors with specific threshold voltages and capacitance values. The compensation transistor operates with different threshold voltage characteristics to counteract the parasitic capacitance-induced voltage changes in the driving transistor during the emission period.
2Stability of the object's composition
If driving transistor electrical characteristics are made identical in all subpixels, then consistent operation is achieved, but process variations cause luminance deviation
Solution Approach 1:
Instead of requiring all transistors to have identical characteristics, the patent applies local quality compensation by introducing compensation transistors with specifically designed threshold voltages in each subpixel. These local compensation transistors are tuned to offset the specific threshold voltage variations of each driving transistor, allowing for both manufacturing simplicity and luminance uniformity.
Solution Approach 2:
The patent implements feedback compensation where the compensation transistor senses the voltage changes in the driving transistor during the emission period and generates an opposite polarity compensation voltage. This feedback mechanism continuously adjusts the gate voltage to maintain stable driving current and eliminate luminance deviation.
Data Source
AI summary
A subpixel circuit including a light emitting element configured to receive a high-potential driving voltage at an anode electrode, a driving transistor including a first node, a second node, and a third node, a scan transistor controlled by a first scan signal and configured to transmit a data voltage through a data line, a storage capacitor, and a control circuit configured to control operations of the driving transistor, the scan transistor, and the storage capacitor, and located between a cathode electrode of the light emitting element and a low-potential base voltage line for providing a low-potential base voltage, wherein the control circuit includes a first light emitting transistor controlled by an emission signal, and electrically connected between the cathode electrode of the light emitting element and the driving transistor, a second light emitting transistor controlled by the emission signal, and electrically connected to the second node and a node to which the low-potential base voltage is supplied, a reset transistor controlled by a second scan signal, and electrically connected between a node to which a reset voltage is supplied and the second node, an initialization transistor controlled by a third scan signal, and electrically connected between a node to which a gate initialization voltage is supplied and the first node, a setting transistor controlled by the third scan signal, and electrically connected between a node to which a setting voltage is supplied and the third node, and an auxiliary capacitor connected between the second node and a node to which the low-potential base voltage is supplied, wherein the second scan signal is a same signal with a different phase from the third scan signal.