Micro-LED Chip Bonding Structure to Prevent Light Leakage

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Solution Overview

Problem

Micro-LED display technologies face challenges such as mass transfer difficulties due to poor mechanical strength of AIGaInP materials, leading to reduced efficiency and increased yield issues in chip handling and placement.

Innovation Solution

A chip structure comprising a chip wafer unit with sub-pixel light-emitting functional layers and a color conversion layer substrate unit, connected through a metal bonding layer made of high refractive index materials to prevent light leakage and improve light-emitting efficiency, and a manufacturing method involving metal wafer bonding technology to form the chip structure.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Illumination intensity

If AIGaInP materials are used for Micro-LED chips, then high brightness and high luminescence efficiency are achieved, but poor mechanical strength causes mass transfer difficulties and reduces product yield

Engineering Contradiction:
ImprovebrightnessVSAvoidmechanical strength
Core Design Contradiction:
Illumination intensityVSStrength

Solution Approach 1:

The patent introduces a bonding layer as an intermediary between the Micro-LED chip and the substrate, which provides mechanical support and stress relief to compensate for the poor mechanical strength of AIGaInP materials, enabling mass transfer while maintaining high brightness and luminescence efficiency

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent employs composite material structures including multiple metal layers (Al, Ti, Cu) and dielectric layers (SiO2, Si3N4) in the bonding and electrode structures, creating a composite system that combines the optical properties of AIGaInP with the mechanical strength of metal and ceramic materials

Inventive Principle:
Principle #40Composite materials

2Ease of manufacture

If conventional bonding methods are used, then manufacturing process is simple, but light leakage occurs and light-emitting efficiency is reduced

Engineering Contradiction:
Improvemanufacturing process simplicityVSAvoidlight leakage
Core Design Contradiction:
Ease of manufactureVSLoss of energy

Solution Approach 1:

The bonding layer is constructed as a composite structure with multiple metal sub-layers (Al, Ti, Cu) and dielectric layers (SiO2, Si3N4), where the combination of materials provides both mechanical bonding functionality and optical properties to prevent light leakage, maintaining light-emitting efficiency while enabling manufacturable bonding processes

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

The bonding layer serves multiple functions simultaneously: it provides mechanical adhesion between chip and substrate, acts as an optical barrier to prevent light leakage, and functions as an electrical conductor for current distribution, thereby addressing multiple requirements without complicating the manufacturing process

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution enhances the light-emitting efficiency of Micro-LEDs by preventing light leakage and improving the bonding strength between the chip wafer unit and the color conversion layer substrate, thereby addressing the mass transfer and yield issues in Micro-LED display technology.

Implementation Method 1

a bonding layer, arranged between the sub-pixel light-emitting functional layers and the color conversion layer, and configured to bond the chip wafer unit and the color conversion layer substrate unit

Methodology Applied
Scientific EffectAdhesion: Adhesive

Implementation Method 2

the second metal sub-layer is provided as a eutectic alloy layer connecting the first metal sub-layer and the third metal sub-layer

Methodology Applied
Scientific EffectEutectic alloy formation: Fusible Alloy

Data Source

PatentUS20240413274A1Chip structure and manufacturing method therefor, display substrate and display device
Publication Date: 2024.12.12 BOE TECHNOLOGY GROUP CO LTD
  • US20240413274A1 patent drawing
  • US20240413274A1 patent drawing
  • US20240413274A1 patent drawing

AI summary

A chip structure is provided. The chip structure includes a chip wafer unit and a color conversion layer substrate unit arranged on a light-exit side of the chip wafer unit. The chip wafer unit includes a plurality of sub-pixel light-emitting functional layers. The color conversion layer substrate unit includes a color conversion layer arranged on the light-exit side of the chip wafer unit. The chip wafer unit further includes a first bonding layer, arranged between the sub-pixel light-emitting functional layers and the color conversion layer, and configured to bond the chip wafer unit and the color conversion layer substrate unit.