OLED Drive Backplane Layer Separation for Static Interference

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Solution Overview

Problem

Existing OLED display panels often experience abnormal display issues such as black screens and flickering due to interference from static electricity, which affects the stable transmission of electrical signals.

Innovation Solution

The drive backplane design includes a circuit layer with gate connection lines and bus lines that are insulated from each other, featuring different layers and contact holes to increase impedance and block static electricity, ensuring stable signal transmission and reducing interference.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If gate connection lines and bus lines are arranged on the same layer, then the device structure is simpler, but static electricity interference occurs causing black screens and flickers

Engineering Contradiction:
Improvesignal transmission stabilityVSAvoidcircuit layer structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies dimensionality change by moving gate connection lines to a different layer than bus lines. Specifically, gate connection lines are arranged on the first layer while bus lines are on the second layer, utilizing the vertical dimension to separate previously coplanar conductors. This layer separation eliminates static electricity interference while maintaining signal transmission stability, resolving the contradiction between reliability and structural simplicity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent segments the circuit layer into multiple distinct layers, with gate connection lines on the first layer and bus lines on the second layer. This segmentation physically divides the conductor paths that were previously intertwined, preventing electrostatic interference. The segmentation approach maintains functional integrity while eliminating the harmful interaction between gate and bus lines.

Inventive Principle:
Principle #1Segmentation

2Object-affected harmful factors

If gate connection lines are insulated from bus lines using different layers, then static electricity interference is blocked, but manufacturing complexity increases

Engineering Contradiction:
Improvestatic electricity interferenceVSAvoidcircuit layer fabrication
Core Design Contradiction:
Object-affected harmful factorsVSEase of manufacture

Solution Approach 1:

The patent utilizes vertical layering to isolate gate connection lines from bus lines, placing them on different planes (first layer vs. second layer). This dimensional separation inherently provides insulation and blocks static electricity interference without requiring additional insulating materials or complex fabrication steps. The layer-based approach is compatible with standard thin-film transistor manufacturing processes.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Ease of operation

If gate connection lines are placed on the same layer as gate lines, then routing is simpler, but signal interference increases

Engineering Contradiction:
Improvesignal routingVSAvoidsignal interference
Core Design Contradiction:
Ease of operationVSObject-affected harmful factors

Solution Approach 1:

The patent resolves signal interference by elevating gate connection lines to a different layer (first layer) separate from gate lines (second layer). This vertical separation maintains routing simplicity while eliminating capacitive coupling and electromagnetic interference between adjacent conductors. The dimensional approach allows straightforward routing patterns without compromising signal integrity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS20240292691A1Drive backplane, display panel, and display apparatus
Publication Date: 2024.08.29 CHENGDU BOE OPTOELECTRONICS TECH CO LTD
  • US20240292691A1 patent drawing
  • US20240292691A1 patent drawing
  • US20240292691A1 patent drawing

AI summary

The drive backplane includes a pixel area and a control area outside the pixel area. The control area includes a circuit area and a bus area between the circuit area and the pixel area. The drive backplane includes a substrate and a circuit layer provided on a side of the substrate. The circuit layer includes a plurality of pixel circuits, a plurality of gate lines, a gate drive circuit, bus lines, and a plurality of gate connection lines.