Display Panel Transistor Charge Inducing Layer for Data Line Charging
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Solution Overview
Problem
Conventional display panels face issues with smooth display due to insufficient charging rates of data lines under high resolution and high refresh rate requirements, leading to adverse effects on display smoothness.
Innovation Solution
A display panel design incorporating a transistor with an active layer, a charge inducing layer, a first insulating layer, and a gate electrode, forming a capacitance system that extends conduction time and enhances charging rates by inducing specific charges on the active layer's surfaces, thereby improving data line charging efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If switching frequency of transistors is increased to meet high refresh rate requirements, then refresh rate is improved, but conduction time becomes shorter resulting in insufficient data line charging
Solution Approach 1:
The charge inducing layer is configured to induce charges in advance during the conduction period, creating a preliminary electric field that accelerates carrier accumulation in the active layer. This preliminary action ensures that sufficient charge is accumulated before the transistor switches off, compensating for the reduced conduction time at high refresh rates.
Solution Approach 2:
The invention changes the electrical parameters of the transistor by introducing the charge inducing layer, which modifies the charge distribution and electric field characteristics in the active layer. This parameter change enables faster charging of data lines within the shortened conduction time, allowing high refresh rates to be achieved without sacrificing charging efficiency.
2Productivity
If conduction time is extended to improve data line charging, then charging rate is improved, but switching speed decreases affecting refresh rate
Solution Approach 1:
The charge inducing layer performs preliminary charge accumulation during the conduction phase, creating an advanced electric field that speeds up the charging process. This allows the transistor to maintain fast switching speed while achieving sufficient data line charging, as the preliminary charge induction compensates for the reduced conduction time.
Solution Approach 2:
By introducing the charge inducing layer, the electrical parameters of the transistor are modified to enable faster charge accumulation. This parameter change allows the transistor to achieve both fast switching speed and adequate charging rate, resolving the trade-off between switching performance and charging efficiency.
3Speed
If transistor switching frequency is increased, then refresh rate is improved, but data line charging completeness deteriorates
Solution Approach 1:
The charge inducing layer executes preliminary charge induction during the conduction period, creating an advanced electric field that accelerates charge accumulation in the active layer. This preliminary action ensures that even at high switching frequencies, the data lines receive sufficient charge to maintain display reliability and smoothness.
Solution Approach 2:
The invention changes the electrical parameters by introducing the charge inducing layer, which modifies the charge distribution characteristics and electric field strength. This parameter change enables complete data line charging even at high switching frequencies, maintaining display reliability while achieving high refresh rates.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively boosts data line charging rates, ensuring a smooth display performance even under high resolution and high refresh rate conditions, meeting design requirements for improved display quality.
Implementation Method 1
based on a turn-on signal applied to the gate electrode and/or the charge inducing layer, a first charge is induced on an upper surface of the active layer, and a second charge is induced on a lower surface of the active layer
Implementation Method 2
the actively layer, the gate electrode, and the charge inducing layer collectively form a capacitance system, which benefits extending of the conduction time of the transistor
Data Source
AI summary
A display panel and a display device are disclosed. The display panel includes a transistor disposed in the non-display area. The transistor includes a charge inducing layer, and a first insulating layer, an active layer, a second insulating layer, and a gate electrode all disposed on the charge inducing layer, so that the actively layer, the gate electrode, and the charge inducing layer collectively form a capacitance system, which benefits extending of the conduction time of the transistor, thereby giving a boost to an increase in a charging rate of the data line, and ensuring a smooth display of the display panel.