Stacked TFT Display Layout for High-Density OLED Current Control
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Solution Overview
Problem
Existing flat panel display devices, particularly OLED displays, face challenges in achieving high integration density and efficient power consumption while maintaining fast response speed.
Innovation Solution
The display device incorporates a substrate with transistors and light-emitting elements connected through contact holes, utilizing polycrystalline silicon and oxide semiconductors, and shared voltage lines to enhance integration density and power efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multiple transistors and light-emitting elements are integrated in a compact arrangement, then integration density is improved, but device complexity increases
Solution Approach 1:
The patent implements nesting by placing the second transistor on top of the first transistor, with the second semiconductor layer positioned over the first gate electrode. This vertical stacking arrangement allows multiple functional components to occupy the same planar footprint, thereby increasing integration density while managing device complexity through hierarchical organization.
Solution Approach 2:
The patent transitions from a planar two-dimensional layout to a three-dimensional vertical architecture by stacking transistors and conductive layers in multiple layers. The first and second transistors are arranged vertically with conductive layers connecting them through contact holes, utilizing the vertical dimension to achieve higher integration density without proportionally increasing planar area.
2Area of stationary object
If transistors are stacked vertically to increase integration density, then area is reduced, but manufacturing precision requirements increase
Solution Approach 1:
The patent divides the device into distinct manufacturing layers, with the first transistor formed in a lower layer and the second transistor formed in an upper layer. Each layer can be fabricated and processed separately before being integrated, allowing standard manufacturing processes to be applied to each segment independently while achieving vertical integration, thus managing manufacturing precision requirements.
3Quantity of substance
If contact holes are used to electrically connect stacked transistors, then integration density is improved, but device complexity increases
Solution Approach 1:
The patent introduces conductive layers as intermediary elements that facilitate electrical connection between the first and second transistors. These conductive layers are positioned within contact holes and serve as mediators to establish electrical pathways through insulating layers, enabling vertical integration while managing the complexity of inter-layer connections through standardized intermediary structures.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution improves integration density and power efficiency, allowing for high-quality image display with precise current control and reduced power consumption.
Implementation Method 1
the first gate electrode of the first transistor and the second semiconductor layer of the second transistor are electrically connected to each other through a contact hole
Implementation Method 2
organic light-emitting diodes, which emit light through the recombination of electrons and holes
Data Source
AI summary
Provided is a display device including a substrate, a first transistor disposed on the substrate and including a first semiconductor layer and a first gate electrode, a second transistor disposed on the first transistor and including a second semiconductor layer and a second gate electrode, and a light-emitting element disposed on the second transistor and electrically connected to the first transistor, wherein the first gate electrode of the first transistor and the second semiconductor layer of the second transistor are electrically connected through a contact hole.