OLED Display Panel Shield Layer for Gate Trace Interference

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Solution Overview

Problem

Fan-out traces in OLED display panels interfere with signal transmission to gate traces, causing abnormal display issues due to electrical signal interference.

Innovation Solution

A display panel design featuring a shield layer between the first and second metal layers, where the shield layer overlaps with orthographic projections of both drive and gate traces, electrically connected to constant voltage traces, to shield the signal interference between drive and gate traces.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If fan-out traces are arranged in the display area to compress edges, then the edge space is reduced, but electrical signal interference occurs between fan-out traces and gate traces

Engineering Contradiction:
Improveedge spaceVSAvoidelectrical signal interference
Core Design Contradiction:
Area of stationary objectVSObject-affected harmful factors

Solution Approach 1:

A shield layer is introduced as an intermediary between the first metal layer (containing gate traces) and the second metal layer (containing drive traces). This shield layer acts as a mediator to block electrical signal interference while allowing the fan-out traces to remain in the display area for edge compression.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The harmful electrical signal interference is extracted and isolated by separating the first and second metal layers with a shield layer. This extraction removes the interference problem while preserving the beneficial arrangement of traces in the display area.

Inventive Principle:
Principle #2Taking out (Extraction)

2Object-affected harmful factors

If shield layer is added between metal layers to block interference, then signal interference is reduced, but device complexity increases

Engineering Contradiction:
Improvesignal interferenceVSAvoidlayer structure complexity
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The shield layer serves multiple functions simultaneously: it blocks electrical signal interference between metal layers, provides a reference potential for signal stability, and maintains structural integrity. This multi-functionality reduces the need for additional separate components.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The shield layer is integrated into the existing multi-layer structure of the display panel, combining the shielding function with the existing trace routing architecture. This merging approach adds the shielding capability without requiring a completely separate system.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design effectively shields the signal interference between drive and gate traces, improving the display quality by reducing or eliminating signal interference and enhancing the display panel's performance.

Implementation Method 1

a shield layer between the first metal layer and the second metal layer, the first metal layer includes a plurality of gate traces, the shield layer includes a plurality of shield traces electrically connected to the constant voltage traces

Methodology Applied
Scientific EffectElectromagnetic shielding: Faraday Cage

Data Source

PatentUS12178092B2Display panel
Publication Date: 2024.12.24 WUHAN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO LTD
  • US12178092B2 patent drawing
  • US12178092B2 patent drawing
  • US12178092B2 patent drawing

AI summary

The present application provides a display panel. The display panel includes a plurality of data lines, a plurality of constant voltage traces, and a plurality of drive traces located in a display area. The display panel further includes a first metal layer, a second metal layer, and a shield layer between the first metal layer and the second metal layer, wherein the first metal layer includes a gate trace, the shield layer includes a plurality of shield traces, and the second metal layer includes the drive trace. An overlap region of the drive trace and the gate trace on the shield layer overlaps with the shield trace.