GOA Drive Circuit Partitioning for Consistent OLED Refresh Pulses
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Solution Overview
Problem
In OLED displays using LTPO technology, the inconsistency of pulse signal widths during partition refresh leads to inefficiencies, particularly when pulse signals overlap, affecting the effectiveness of the partitioning function and increasing power consumption.
Innovation Solution
A drive circuit design with multiple GOA circuits and partition control signal lines, employing alternating connections and control circuits to ensure consistent pulse signal widths and reduce power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single partition control signal line is used to control all GOA circuits, then the device complexity is reduced, but the pulse signal width becomes inconsistent when pulse signals overlap during partition refresh
Solution Approach 1:
The single partition control signal line is segmented into multiple independent partition control signal lines, with each line controlling a specific group of GOA circuits. This segmentation allows independent control of pulse signals in different regions, preventing width inconsistency when pulses overlap during partition refresh operations.
Solution Approach 2:
Different groups of GOA circuits are assigned different partition control signal lines, allowing each group to have customized pulse signal control according to its specific refresh requirements. This local quality approach ensures that pulse width consistency is maintained in each region independently.
2Productivity
If the refresh frequency is increased to improve video or game experience, then the display quality is improved, but the power consumption increases and battery life is reduced
Solution Approach 1:
The system dynamically adjusts the refresh frequency of different GOA circuit groups based on their specific requirements. During partition refresh, only the necessary groups are refreshed at high frequency while others operate at lower frequency, enabling dynamic frequency adjustment that balances display quality and power consumption.
Solution Approach 2:
The patent implements periodic refresh operations where GOA circuits are refreshed in alternating periods rather than continuously. This periodic action allows the system to maintain high refresh frequency for video/game content while reducing overall power consumption by skipping refresh cycles for static content.
3Productivity
If pulse signals from multiple GOA circuits overlap during partition refresh, then the refresh coverage is improved, but the pulse width inconsistency increases and affects partitioning function effectiveness
Solution Approach 1:
The GOA circuits are segmented into multiple groups, each controlled by a dedicated partition control signal line. This segmentation ensures that even when pulse signals from different groups overlap in time, each group maintains consistent pulse width control independent of others, preserving partitioning function reliability.
Solution Approach 2:
The partition control signal lines act as intermediaries between the control logic and the GOA circuits. Each signal line mediates the pulse signal generation for its specific group, ensuring that pulse width consistency is maintained even during overlapping refresh operations across different groups.
Data Source
AI summary
A drive circuit includes first gate driver on array (GOA) circuits and p first partition control signal lines, p is an integer greater than or equal to 2, the first GOA circuits are sequentially cascaded, the first GOA circuits include n first GOA circuit combinations, n is an integer greater than or equal to p, and first GOA circuits in each first GOA circuit combination are sequentially cascaded; and a partition control end of each first GOA circuit in a (px+y)th first GOA circuit combination in the n first GOA circuit combinations is coupled to a yth first partition control signal line in the p first partition control signal lines, x is an integer greater than or equal to 0 and less than or equal to (n−y)/p, and y is an integer greater than or equal to 1 and less than or equal to p.