Display Interconnect Layout for Light Extraction and Mura Control

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Solution Overview

Problem

The manufacturing of display devices faces challenges in achieving high light extraction rates, which is crucial for large-scale display devices, as existing methods are inefficient in this regard.

Innovation Solution

The proposed solution involves a display device structure that includes a substrate with interconnection metal layers, passivation layers, through vias, electrodes, and bonding pads, which are carefully designed and manufactured to enhance light extraction and balance stresses across the active and border regions, thereby improving light emission efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If conventional manufacturing methods are used for display devices, then the manufacturing process is simple, but the light extraction rate is poor

Engineering Contradiction:
Improvemanufacturing process simplicityVSAvoidlight extraction rate
Core Design Contradiction:
Ease of manufactureVSIllumination intensity

Solution Approach 1:

The patent segments the manufacturing process into distinct stages: forming interconnection metal layers in both active and border regions, selectively removing metal layers in border regions, and forming through vias. This segmentation allows optimization of light extraction in the active region while managing stress in border regions, resolving the contradiction between manufacturing simplicity and light extraction performance

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies local quality by treating different regions differently: the active region retains interconnection metal layers for optimal light extraction, while border regions have removed metal layers to reduce stress. This localized differentiation enables simultaneous optimization of light extraction rate in display areas and stress management in border areas

Inventive Principle:
Principle #3Local quality

2Reliability

If interconnection metal layers are kept in border regions, then electrical connection is maintained, but stress imbalance causes mura defects

Engineering Contradiction:
Improveelectrical connectionVSAvoidmura defects
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent extracts (removes) interconnection metal layers from border regions while maintaining them in active regions. This selective extraction eliminates the source of stress-induced mura defects in border areas while preserving electrical connection functionality in the active display regions where light extraction is critical

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent implements local quality by applying different metal layer configurations to different regions: border regions have removed metal layers to prevent mura, while active regions retain metal layers for electrical connection and light extraction optimization

Inventive Principle:
Principle #3Local quality

3Illumination intensity

If through vias are formed to improve light extraction, then light extraction rate increases, but device structure becomes more complex

Engineering Contradiction:
Improvelight extraction rateVSAvoidstructure complexity
Core Design Contradiction:
Illumination intensityVSDevice complexity

Solution Approach 1:

The patent merges the through via formation process with existing manufacturing steps. The through vias are formed during the same process sequence as interconnection layer formation and passivation layer deposition, combining multiple functions into integrated process steps rather than adding separate complex operations

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentEP4447641A1Display device and manufacturing method thereof
Publication Date: 2024.10.16 TAIZHOU GUANYU TECH CO LTD
  • EP4447641A1 patent drawingFigure 1A
  • EP4447641A1 patent drawingFigure 1B
  • EP4447641A1 patent drawingFigure 2

AI summary

The disclosure provides a display device including a substrate, a first interconnection metal layer, a second interconnection metal layer, a passivation layer, a first through via, a second through via, a first electrode and a bonding pad. The substrate includes active and border regions. The first interconnection metal layer is disposed on the substrate and located in the active region. The second interconnection metal layer is disposed on the substrate and located in the border region. The passivation layer is disposed on the first and second interconnection metal layers. The first through via passes through the passivation layer and is electrically connected to the first interconnection metal layer. The second through via passes through the passivation layer and is electrically connected to the second interconnection metal layer. The first electrode is disposed on the first through via. The bonding pad is disposed on the second through via.