Display Panel Signal Line Overlap Segmentation for Crosstalk Control

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Solution Overview

Problem

Denser wiring in display panels leads to signal crosstalk due to parasitic capacitance at overlaps between power supply and data signal lines, degrading display quality.

Innovation Solution

A display panel design where the power supply signal line overlaps the data signal line with strategically placed through holes, reducing the effective overlap area and parasitic capacitance, and incorporating a second data signal line that does not overlap the power supply signal line, along with optimized layer structures and material thicknesses to minimize impedance and resistance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If the wiring density is increased to achieve higher resolution and more pixel circuit elements, then the display panel can support higher resolution and more complex pixel drive circuits, but parasitic capacitance increases at line overlaps causing signal crosstalk and degraded display quality

Engineering Contradiction:
Improvedisplay resolutionVSAvoidparasitic capacitance
Core Design Contradiction:
Measurement precisionVSObject-generated harmful factors

Solution Approach 1:

The overlapping region between power supply signal line and data signal line is segmented by introducing through holes that divide the continuous overlap into discrete segments. This reduces the effective overlapping area and consequently decreases the parasitic capacitance while maintaining the necessary wiring density for high resolution displays

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The through holes are strategically positioned only in the overlapping regions between signal lines, creating a localized modification. This allows the wiring density to remain high in non-overlapping areas while reducing parasitic capacitance specifically where overlaps occur, thus maintaining display resolution without suffering from signal crosstalk

Inventive Principle:
Principle #3Local quality

2Reliability

If the power supply signal line width is increased to reduce resistance and maintain signal stability, then voltage drops are reduced, but the parasitic capacitance at overlaps with data signal lines increases causing more signal crosstalk

Engineering Contradiction:
Improvesignal stabilityVSAvoidsignal crosstalk
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

By segmenting the overlapping region with through holes, the effective overlapping area is reduced proportionally to the area occupied by through holes. This allows the power supply signal line to maintain its width for low resistance while the segmented overlap reduces parasitic capacitance and signal crosstalk

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The geometry parameters of the overlapping region are modified by introducing through holes, changing the effective overlapping area from a continuous region to a fragmented region. This parameter change reduces the parasitic capacitance value while allowing the power supply line width to remain sufficient for maintaining signal stability

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design reduces signal crosstalk and improves display quality by minimizing parasitic capacitance and maintaining signal stability, as evidenced by reduced signal fluctuations from 95 mV to 65 mV in verification results.

Implementation Method 1

there are overlaps between lines of different potentials in a thickness direction of the display panel, and large parasitic capacitances are generated at the overlaps

Methodology Applied
Scientific EffectParasitic capacitance: Parasitic Capacitance

Data Source

PatentUS20240339458A1Display panels
Publication Date: 2024.10.10 WUHAN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO LTD
  • US20240339458A1 patent drawing
  • US20240339458A1 patent drawing
  • US20240339458A1 patent drawing

AI summary

A display panel includes pixel circuitry disposed on a substrate. The pixel circuitry includes a plurality of transistor groups and a plurality of signal line groups. The plurality of transistor groups are divided into a plurality of transistor group columns by the signal line groups. Each transistor group is disposed between two adjacent signal line groups. Each signal line group includes a power supply signal line and a first data signal line. The power supply signal line at least partially overlaps the first data signal line in a thickness direction of the display panel. The power supply signal line is provided with at least one through hole. The first data signal line overlaps the through hole in the thickness direction.