Display Panel Electrode Stack for Stable Storage Capacitance

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Solution Overview

Problem

The existing 4Mask process in LCD manufacturing leads to instability in the capacitance between electrode plates due to the semiconductor layer's electrical property changes, causing signal crosstalk and affecting display quality.

Innovation Solution

A display panel design with a first and second conductive layer, where the second electrode plate comprises a stacked structure of additional conductive, semiconductor, and metal sublayers, maintaining the same potential as the first electrode plate, eliminating the semiconductor layer between them to stabilize capacitance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If the 4Mask process is used to form the upper electrode plate and data line as a stacked structure of semiconductor layer and metal layer, then the manufacturing process is simplified and cost is reduced, but the electrical property of the semiconductor layer changes when positive and negative polarity of the metal layer changes, causing voltage fluctuation of the lower electrode plate and affecting storage capacitor stability

Engineering Contradiction:
Improvemanufacturing process simplicityVSAvoidstorage capacitor stability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The second electrode plate is segmented into multiple sublayers: a second additional conductive sublayer, a second semiconductor sublayer, and a second metal sublayer. This segmentation allows the conductive sublayer to be positioned closer to the first electrode plate, forming the storage capacitor, while the semiconductor sublayer is separated from the capacitor-forming region, eliminating its interfering effect on capacitance stability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The second additional conductive sublayer acts as an intermediary between the first electrode plate and the second metal sublayer. It forms the capacitive interface with the first electrode plate, while being electrically connected to the second metal sublayer through the second semiconductor sublayer, thus mediating the connection while isolating the capacitor from semiconductor interference.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If the semiconductor layer is disposed between the metal layer and the lower electrode plate to form the storage capacitor structure, then the upper electrode plate and data line can be formed simultaneously, but the voltage of the lower electrode plate fluctuates and signal crosstalk occurs

Engineering Contradiction:
Improveformation efficiencyVSAvoidsignal crosstalk
Core Design Contradiction:
ProductivityVSObject-generated harmful factors

Solution Approach 1:

The harmful effect of the semiconductor layer on capacitance stability is extracted and isolated. The semiconductor sublayer is positioned away from the capacitor-forming region, taking out its harmful electrical property variations from the storage capacitor structure while maintaining its necessary electrical connection functions.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

Different regions of the second electrode plate are given different functional qualities: the second additional conductive sublayer provides stable conductive properties for capacitor formation, while the second semiconductor sublayer provides semiconductor functionality for signal transmission, with each region optimized for its specific function.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS12176355B2Display panel and manufacturing method thereof
Publication Date: 2024.12.24 TCL CHINA STAR OPTOELECTRONICS TECHNOLOGY CO LTD
  • US12176355B2 patent drawing
  • US12176355B2 patent drawing
  • US12176355B2 patent drawing

AI summary

Embodiments of the present disclosure are directed to a display panel and a manufacturing method thereof, which includes a plurality of first electrode plates and a plurality of second electrode plates, and one of the second electrodes plate is disposed corresponding to one of the first electrode plates; each of the second electrode plates includes a first additional conductive sublayer, a first semiconductor sublayer, and a first metal sublayer stacked, and the first metal sublayer is electrically connected with the first additional conductive sublayer.