Display Panel Drain Electrode Overlap for Voltage Uniformity
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Solution Overview
Problem
Existing liquid crystal display panels face challenges in ensuring uniform voltage supply to transistors, leading to inconsistent display quality due to variations in the design of transistor units and their electrodes.
Innovation Solution
The display panel design incorporates a specific configuration of thin film transistors (TFTs) with drain electrodes that have an overlapping portion with the gate electrode, featuring cutouts or steps that adjust based on distance from the scan signal's starting point, ensuring a consistent and increased surface area for uniform voltage distribution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the drain electrode has a uniform width along its length, then the manufacturing process is simple, but the voltage distribution across different transistors becomes non-uniform due to varying distances from the scan signal starting point
Solution Approach 1:
The drain electrode is designed with a non-uniform width where the first portion (closer to the scan signal starting point) has a greater width than the second portion. This local variation in geometry compensates for the varying distances to different transistors, ensuring uniform voltage distribution across all transistor gates despite their different positions.
2Device complexity
If all transistors are supplied with voltage from a single scan signal starting point, then the circuit design is simplified, but transistors at different distances receive non-uniform voltage
Solution Approach 1:
The drain electrode width parameter is changed along its length to compensate for distance-related voltage drops. By making the first portion wider than the second portion, the electrode geometry parameters are optimized to maintain uniform voltage supply to all transistors despite their varying distances from the signal starting point.
Data Source
AI summary
A display panel includes a gate integrated circuit, a number of scan lines extending from the gate integrated circuit for transmitting scan signals, a source integrated circuit, a number of data lines extending from the source integrated circuit for transmitting data signals, a number of pixel electrodes for receiving the scan signals and the data signals, and a number of transistors each electrically coupled to a corresponding scan line, a corresponding data line, and a corresponding pixel electrode. The transistors each include a gate electrode, a source electrode, and a drain electrode. The drain electrode includes an overlapping portion overlapping with the gate electrode. The gate integrated circuit transmits the scan signals along the scan lines. A size of the overlapping portion increases along a transmitting direction of the scan signal along the scan line.