Display Panel Edge Layout for Narrow-Bezel Laser Cutting
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Solution Overview
Problem
The production yield of narrow-bezel or bezel-free display panels is low due to the risk of transistor failure during the laser cutting process, as transistors are often close to the cutting edges.
Innovation Solution
The display panel design includes transistors positioned further away from the cutting edges compared to the connection electrodes, reducing the risk of damage during laser cutting by increasing the distance between transistors and the edge, and staggering the pixel and shift drive circuits to adaptively shift them away from the cutting path.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Shape
If transistors are positioned close to the cutting edge to achieve narrow-bezel or bezel-free design, then the display panel can achieve smaller bezel size, but the production yield decreases due to transistor failure risk during laser cutting
Solution Approach 1:
The patent divides the circuit layout into distinct regions: a first region containing connection electrodes close to the cutting edge, and a second region containing transistors positioned further away. This spatial segmentation allows the connection electrodes to be optimally positioned for narrow-bezel design while protecting transistors from laser cutting damage, thereby resolving the contradiction between bezel size and production yield
Solution Approach 2:
The patent applies different positioning strategies to different circuit components based on their functional requirements and vulnerability to laser cutting. Connection electrodes are positioned close to the cutting edge to minimize bezel size, while transistors are positioned further away to ensure reliability during manufacturing. This localized optimization resolves the contradiction by allowing each component to be positioned according to its specific needs
2Reliability
If transistors are positioned further away from the cutting edge to reduce failure risk, then production yield improves, but the bezel size increases
Solution Approach 1:
The patent segments the circuit elements into two groups with different positioning: connection electrodes in a first region close to the cutting edge for minimal bezel, and transistors in a second region further away for high reliability. This segmentation allows simultaneous optimization of both bezel size and production yield
Solution Approach 2:
The patent introduces an intermediary structure (the first connection electrode region) that acts as a buffer zone between the cutting edge and the transistor region. This intermediary allows the connection electrodes to be close to the edge for small bezel while maintaining a safe distance for transistors, thus resolving the contradiction between bezel size and production yield
Data Source
AI summary
A display panel, a splicing screen, and a display apparatus. The display panel comprises an array base plate comprising a substrate as well as a plurality of transistors and a plurality of connection electrodes located on one side of the substrate; the plurality of transistors comprise a first transistor, and the plurality of connection electrodes comprise a first connection electrode; the array base plate has at least one first edge; the first transistor is adjacent to the first edge, and the first connection electrode is adjacent to the first edge, a distance between the first transistor and the first edge is greater than a distance between the first connection electrode and the first edge. The present invention can reduce the risk of failure of the transistors near the cutting edge due to laser cutting in the laser cutting process, and can improve the production yield of narrow-bezel or bezel-free products.


