Display Panel Pixel Aperture Ratio Optimization
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing display panel designs face challenges in maximizing the aperture ratio of pixels due to the placement and shielding of gate lines, which affects the efficiency of light shielding and electrical performance.
Innovation Solution
The design involves locating gate lines in the same adjacent zone between pixels, allowing for reduced light-shielding block areas and increased aperture ratio by overlapping shielding requirements, and using auxiliary metal layers or light-shielding bars strategically to enhance light shielding and electrical efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If gate lines are placed separately in adjacent zones between pixels, then each pixel can be driven independently, but the total area occupied by light-shielding blocks increases and aperture ratio decreases
Solution Approach 1:
The patent merges the light-shielding blocks of adjacent gate lines by positioning gate lines in the same adjacent zone between pixels. The light-shielding blocks of multiple gate lines are combined into a single shared block, reducing the total light-shielding area while maintaining independent pixel driving capability.
Solution Approach 2:
The patent transitions from a conventional layout where gate lines are positioned in separate zones to a design where gate lines share the same adjacent zone. This spatial reconfiguration in the planar dimension allows overlapping light-shielding requirements to be satisfied by a single block.
2Area of stationary object
If gate lines are positioned to share adjacent zones, then light-shielding block area is reduced, but routing complexity and electrical isolation requirements increase
Solution Approach 1:
The patent segments the gate lines into distinct conductive paths that can be electrically isolated while sharing the same physical adjacent zone. Each gate line maintains independent electrical characteristics through proper routing segmentation, allowing complex electrical requirements to be satisfied within a compact spatial arrangement.
Data Source
AI summary
A display panel is provided. A display panel includes a plurality of pixels and a plurality of gate lines. The pixels include a first pixel, a second pixel and a third pixel. The gate lines include a first gate line, a second gate line and a third gate line. The first gate line drives the first pixel. The second gate line drives the second pixel. The third gate line drives the third pixel. The first gate line, the second gate line and the third gate line are disposed sequentially and driven at different time. The first pixel and the second pixel are arranged respectively at two opposite sides of the first gate line and the second gate line. The second pixel and the third pixel are arrange between the second gate line and the third gate line.