Display Panel Shielding Pattern for Organic Polarization Control

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Solution Overview

Problem

Display quality in display panels is deteriorated due to the polarization of organic materials by electric fields generated in the transistor layer, affecting the driving current and overall image display.

Innovation Solution

Incorporating a shielding pattern, such as amorphous silicon, between the barrier layers within the base substrate, which shields the polarized organic materials from the electric field, maintaining the electrical characteristics of the transistors and improving display quality.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a transistor layer is used to drive the emission layer, then the display panel can function and display images, but electric fields are generated that polarize organic materials in the base substrate, deteriorating display quality

Engineering Contradiction:
Improvedisplay qualityVSAvoidpolarization effect on organic materials
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

A shielding pattern made of conductive material (such as doped silicon) is introduced as an intermediary layer between the transistor layer and the organic materials in the base substrate. This shielding pattern acts as a mediator that blocks the electric field generated by the transistor layer, preventing the polarization of organic materials while allowing the transistor layer to continue functioning normally. The shielding pattern is disposed on the first barrier layer and extends beneath the gate electrode, creating a protective barrier against electric field interference.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If the shielding pattern is made larger than the gate electrode, then better shielding coverage is achieved, but the device complexity and manufacturing precision requirements increase

Engineering Contradiction:
Improveshielding effectivenessVSAvoidalignment precision between shielding pattern and gate electrode
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The shielding pattern is designed with non-uniform dimensions relative to the gate electrode. Specifically, the shielding pattern extends beyond the gate electrode in certain directions (first and second directions) by controlled amounts (0.8-1.2 μm), providing enhanced shielding coverage where needed. This local extension approach optimizes shielding effectiveness in critical areas while maintaining reasonable manufacturing tolerances, rather than uniformly enlarging the shielding pattern in all directions.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The shielding pattern effectively prevents the transistor layer from being electrically affected by polarization, thereby enhancing the display quality of the display panel by maintaining the integrity of the driving current and image display.

Implementation Method 1

an electric field may be generated by a signal and/or a voltage provided to the transistor layer

Methodology Applied
Scientific EffectElectric Field: Electric Field

Implementation Method 2

Organic materials included in the base substrate may be polarized by the electric field

Methodology Applied
Scientific EffectPolarization: Polarisation

Data Source

PatentUS11856823B2Display panel including gate lines on opposite sides of a shielding pattern, and display device including the same
Publication Date: 2023.12.26 SAMSUNG DISPLAY CO LTD
  • US11856823B2 patent drawing
  • US11856823B2 patent drawing
  • US11856823B2 patent drawing

AI summary

A display panel includes a first organic film layer, a first barrier layer disposed on first organic film layer, a shielding pattern disposed on the first barrier layer, a second barrier layer covering the shielding pattern and disposed on first barrier layer, a first active pattern disposed on the second barrier layer and overlapping the shielding pattern in a plan view, a gate electrode disposed on the first active pattern, an emission control line disposed on the first active pattern and adjacent to a first side of the gate electrode in the plan view, an upper compensation control line disposed on the emission control line and adjacent to a second side of gate electrode in the plan view, and a second active pattern disposed on the emission control line.