Display Pixel Shielding Layout for Stable FD Potential

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Solution Overview

Problem

Parasitic capacitance between the FD (node) storing charge and signal lines in CMOS sensors leads to changes in the potential of the FD, resulting in decreased imaging quality in display devices using CMOS sensors.

Innovation Solution

A pixel layout structure is implemented with shielding wires disposed between the FD and signal lines, such as PR, TX, or SE lines, to reduce or eliminate parasitic capacitance and stabilize the potential of the FD.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If signal lines are placed close to the FD for compact layout, then area is reduced, but parasitic capacitance increases causing potential fluctuations

Engineering Contradiction:
Improvepixel areaVSAvoidparasitic capacitance
Core Design Contradiction:
Area of stationary objectVSObject-affected harmful factors

Solution Approach 1:

A shielding wire is introduced as an intermediary element positioned between the signal line and the floating diffusion node. This shielding wire acts as a mediator that blocks the capacitive coupling between the signal line and the FD, thereby reducing parasitic capacitance while allowing the signal line to remain in close proximity for compact layout

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The shielding wire is connected to a fixed potential (typically ground or a reference potential) to create an equipotential barrier. By maintaining the shielding wire at a constant potential, the electric field between the signal line and the FD is reduced, minimizing parasitic capacitance effects while preserving compact spacing

Inventive Principle:
Principle #12Equipotentiality

2Manufacturing precision

If shielding wire is added to reduce parasitic capacitance, then imaging quality is improved, but device complexity increases

Engineering Contradiction:
Improveimaging qualityVSAvoidcircuit structure
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The shielding wire is merged with existing circuit elements such as power supply lines or ground lines. By combining the shielding function with existing structures, the patent reduces imaging quality degradation from parasitic capacitance without adding separate dedicated shielding components, thereby limiting the increase in device complexity

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If shielding wire is used to stabilize FD potential, then output stability is improved, but manufacturing process complexity increases

Engineering Contradiction:
Improveoutput stabilityVSAvoidmanufacturing process
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The shielding wire is designed to serve multiple functions: it provides electrostatic shielding to reduce parasitic capacitance, acts as a reference potential plane, and can simultaneously function as a power supply line or ground line. This multi-functionality stabilizes the FD potential to improve output stability while avoiding the need for separate manufacturing processes for dedicated shielding structures

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The use of shielding wires effectively suppresses changes in the potential of the FD, thereby maintaining imaging quality and preventing fluctuations in the output of the photosensor.

Implementation Method 1

In case of presence of parasitic capacitance during these three operations which occurs between an FD that stores charge resulting from photocurrent generated by a photodiode and either wire that supplies a control signal or another signal line, changes in the signal causes changes in the potential of the FD.

Methodology Applied
Scientific EffectParasitic capacitance: Capacitance

Data Source

PatentUS20250063836A1Electronic device
Publication Date: 2025.02.20 SEMICON ENERGY LAB CO LTD
  • US20250063836A1 patent drawing
  • US20250063836A1 patent drawing
  • US20250063836A1 patent drawing

AI summary

An object is to provide a pixel structure of a display device including a photosensor which prevents changes in an output of the photosensor and a decrease in imaging quality. The display device has a pixel layout structure in which a shielding wire is disposed between an FD and an imaging signal line (a PR line, a TX line, or an SE line) or between the FD and an image-display signal line in order to reduce or eliminate parasitic capacitance between the FD and a signal line for the purpose of suppressing changes in the potential of the FD. An imaging power supply line, image-display power supply line, a GND line, a common line, or the like whose potential is fixed, such as a common potential line, is used as a shielding wire.